This example shows a workflow that uses HDL Coder™ to deploy a Simulink® subsystem to a Speedgoat FPGA I/O board installed in the target computer. A Simulink Real-Time™ application runs on the target computer and communicates with the FPGA over the PCI bus.
In this case, the FPGA algorithm performs three functions
PWM generation - useful for analog servo control
Increments a counter every 1 second
Maps pulses to 4 I/O channels - useful for sequencing LEDs on/off
The FPGA clock rate is 33MHz. The Simulink Real-Time simulation is set to 1KHz.
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This model contains the algorithm (green subsystem) that will eventually run on the FPGA. Also, it contains some test blocks to verify, in simulation, the algorithm is working as expected before synthesizing the FPGA bitstream. Note that this model is an "FPGA domain" model, meaning the simulation sample rate is representative of the clock rate of the FPGA (33MHz). Hence, 1 second of simulation requires 33e6 iterations of the model.
A test run of the model in Simulink is provided:
Scope1: PWM generation and hardware counter (first increment at 33e6 = 1 sec)
Scope2: Pulse trains used to sequence on/off 4 LEDs
Once the algorithm is ready, use the HDL Workflow Advisor to:
Select the FPGA I/O board
Map the subsystem inports and outports
Synthesize the FPGA bitstream
Generate the Simulink Real-Time interface subsystem
To invoke the HDL Workflow Advisor, right-click the "ServoSystem" subsystem and select HDL Code -> HDL Workflow Advisor.
Select Simulink Real-Time Turnkey by setting the target workflow to Simulink Real-Time FPGA I/O. Select the IO301 by setting the target platform to Speedgoat IO301. This will automatically configure the board characteristics and synthesis tool used in subsequent tasks.
When done, click Run This Task and continue with Task 1.2.
Use the Target Platform Interface Table to specify and map the inports and outports. For this example:
Motor Cmd is the servo position command
LED1 Cmd is the LED1 On/Off command received from the target computer
LED2 Cmd is the LED2 On/Off command received from the target computer
LED3 Cmd is the LED3 On/Off pattern received from the target computer
LED4 Cmd is the LED4 On/Off pattern received from the target computer
PWM Signal is the PWM command to the servo using TTL I/O channel 37
Servo Cmd is the scaled servo position command
HW Counter is the counter that increments 1 count per second
LED1 is the command to LED1 using TTL I/O channel 32
LED2 is the command to LED2 using TTL I/O channel 33
LED3 is the command to LED3 using TTL I/O channel 34
LED4 is the command to LED4 using TTL I/O channel 35
When done, click Run This Task and continue with Task 5.2.
Right-click Task 5.2 and click Run to Selected Task. The HDL Workflow Advisor runs all tasks, synthesizes the FPGA bitstream, and generates a new model that contains an Simulink Real-Time interface subsystem.
Upon completion, a newly generated model containing the Simulink Real-Time interface subsystem appears. On the surface, this subsystem looks like the FPGA subsystem. However, inside, the Simulink algorithm has been removed and replaced with blocks that the target application will use to communicate with the FPGA during simulation execution.
Create or open an Simulink Real-Time model that will run on the target computer while the bitstream algorithm runs on the FPGA.
From the generated model, copy the Simulink Real-Time interface subsystem and paste it in the Simulink Real-Time model. Connect inports and outports. Double-click the interface subsystem and set mask parameters as required.
Build the model. Upon build completion, the Simulink Real-Time application is downloaded to the target computer and the bitstream is downloaded to the FPGA.
Run the application. The servo position command, hardware counter, and LED On/Off patterns are displayed on the target scope.
% EOF dxpcSGIO301servoDemo.m