File: rtGetInf.c1 /* 2 * File: rtGetInf.c 3 * 4 * Code generated for Simulink model 'bh_f14'. 5 * 6 * Model version : 1.18 7 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016 8 * C/C++ source code generated on : Wed Jun 22 07:56:08 2016 9 * 10 * Target selection: ert.tlc 11 * Embedded hardware selection: 32-bit Generic 12 * Code generation objectives: Unspecified 13 * Validation result: Not run 14 */ 15 16 /* 17 * Abstract: 18 * Function to intialize non-finite, Inf 19 */ 20 #include "rtGetInf.h" 21 #define NumBitsPerChar 8U 22 23 /* 24 * Initialize rtInf needed by the generated code. 25 * Inf is initialized as non-signaling. Assumes IEEE. 26 */ 27 real_T rtGetInf(void) 28 { 29 size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar); 30 real_T inf = 0.0; 31 if (bitsPerReal == 32U) { 32 inf = rtGetInfF(); 33 } else { 34 uint16_T one = 1U; 35 enum { 36 LittleEndian, 37 BigEndian 38 } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian; 39 switch (machByteOrder) { 40 case LittleEndian: 41 { 42 union { 43 LittleEndianIEEEDouble bitVal; 44 real_T fltVal; 45 } tmpVal; 46 47 tmpVal.bitVal.words.wordH = 0x7FF00000U; 48 tmpVal.bitVal.words.wordL = 0x00000000U; 49 inf = tmpVal.fltVal; 50 break; 51 } 52 53 case BigEndian: 54 { 55 union { 56 BigEndianIEEEDouble bitVal; 57 real_T fltVal; 58 } tmpVal; 59 60 tmpVal.bitVal.words.wordH = 0x7FF00000U; 61 tmpVal.bitVal.words.wordL = 0x00000000U; 62 inf = tmpVal.fltVal; 63 break; 64 } 65 } 66 } 67 68 return inf; 69 } 70 71 /* 72 * Initialize rtInfF needed by the generated code. 73 * Inf is initialized as non-signaling. Assumes IEEE. 74 */ 75 real32_T rtGetInfF(void) 76 { 77 IEEESingle infF; 78 infF.wordL.wordLuint = 0x7F800000U; 79 return infF.wordL.wordLreal; 80 } 81 82 /* 83 * Initialize rtMinusInf needed by the generated code. 84 * Inf is initialized as non-signaling. Assumes IEEE. 85 */ 86 real_T rtGetMinusInf(void) 87 { 88 size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar); 89 real_T minf = 0.0; 90 if (bitsPerReal == 32U) { 91 minf = rtGetMinusInfF(); 92 } else { 93 uint16_T one = 1U; 94 enum { 95 LittleEndian, 96 BigEndian 97 } machByteOrder = (*((uint8_T *) &one) == 1U) ? LittleEndian : BigEndian; 98 switch (machByteOrder) { 99 case LittleEndian: 100 { 101 union { 102 LittleEndianIEEEDouble bitVal; 103 real_T fltVal; 104 } tmpVal; 105 106 tmpVal.bitVal.words.wordH = 0xFFF00000U; 107 tmpVal.bitVal.words.wordL = 0x00000000U; 108 minf = tmpVal.fltVal; 109 break; 110 } 111 112 case BigEndian: 113 { 114 union { 115 BigEndianIEEEDouble bitVal; 116 real_T fltVal; 117 } tmpVal; 118 119 tmpVal.bitVal.words.wordH = 0xFFF00000U; 120 tmpVal.bitVal.words.wordL = 0x00000000U; 121 minf = tmpVal.fltVal; 122 break; 123 } 124 } 125 } 126 127 return minf; 128 } 129 130 /* 131 * Initialize rtMinusInfF needed by the generated code. 132 * Inf is initialized as non-signaling. Assumes IEEE. 133 */ 134 real32_T rtGetMinusInfF(void) 135 { 136 IEEESingle minfF; 137 minfF.wordL.wordLuint = 0xFF800000U; 138 return minfF.wordL.wordLreal; 139 } 140 141 /* 142 * File trailer for generated code. 143 * 144 * [EOF] 145 */ 146 |