Deploy partitioned hardware and software on a target hardware platform
Hardware-software co-design is designing a system that you can deploy on a combination of
hardware and software. Deploy your MATLAB® or Simulink® design:
As hardware and software on a single device with system-on-chip (SoC) platforms, such
Zynq® and Intel® SoC.
On standalone FPGA boards, such as an Intel FPGA or a Xilinx FPGA board.
On platforms with separate FPGA and processor, such as the Simulink target machine with FPGA I/O boards.
You can partition your design to generate the hardware that targets the FPGA fabric and
the software that runs on the embedded processor. See Hardware-Software Co-Design Workflow for SoC Platforms.
- Hardware Software Co-Design Basics
Run the hardware software co-design workflow for SoC platforms and standalone FPGA
- Model Design and Software Interface
Model algorithm to map DUT ports to AXI interfaces and generate software interface to
probe and rapidly prototype HDL IP core
- Custom IP Core Generation
Generate an HDL IP core that contains HDL code for deployment on standalone FPGA boards,
Speedgoat® I/O modules, Xilinx
Zynq-7000 platform, or Intel SoC Devices
- Custom Reference Design
Create your own custom reference design for integrating the generated IP core into the
target SoC device, Speedgoat I/O modules, or the standalone FPGA boards
Generate and deploy HDL code and embedded software on Xilinx
- Intel SoC Devices
Generate and deploy HDL code and embedded software on Intel SoC Devices
Real-Time FPGA I/O Modules
Generate and deploy HDL code on
Real-Time™ FPGA I/O Modules (requires
- Standalone FPGA Boards
Generate and deploy HDL code on Intel or Xilinx boards