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HDL Coding Standard Customization Properties

Customize HDL coding standard

HDL coding standard customization properties control how HDL Coder™ generates and checks code according to a specified coding standard. By changing property values, you can customize the rules and the appearance of the coding standard report.

To refer to a particular object and property, use dot notation:

cso = hdlcoder.CodingStandard('Industry');
len = cso.SignalPortParamNameLength.length;
cso.ShowPassingRules.enable = false;

The generated code follows the customized coding standard rules as much as possible. If following a coding standard rule causes the HDL code to be uncompilable or unsynthesizable, the coder does not follow the rule.

Coding Standard Report

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Show or do not show passing rules in coding standard report, specified as a structure with this field.

FieldDescription
enable

Set to true to show passing rules in coding standard report.

Set to false to show only rules with errors or warnings.

The default is true.

Basic Coding Rules

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Check for HDL keywords in design names (rule CGSL-1.A.A.3), specified as a structure with this field.

FieldDescription
enable

Set to true to check for HDL keywords in design names.

Set to false if you do not want to check for HDL keywords in design names.

The default is true.

Check for duplicate names in the design (rule CGSL-1.A.A.5), specified as a structure with this field.

FieldDescription
enable

Set to true to check for duplicate names in the design.

Set to false if you do not want to check for duplicate names in the design.

The default is true.

Check for module, instance and entity name lengths (rule CGSL-1.A.B.1), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check the length of module, instance, and entity names.

Set to false if you do not want to check the length of module, instance, and entity names.

The default is true.

length

Minimum and maximum length of module, instance, and entity name names, specified as a 2-element array of positive integers.

The first element is the minimum length, and the second element is the maximum length. The default is [2 32].

Check for signal, port, and parameter name lengths (rule CGSL-1.A.C.3), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check the length of signal, port, and parameter names.

Set to false if you do not want to check the length of signal, port, and parameter names.

The default is true.

length

Minimum and maximum length of signal, port, and parameter names, specified as a 2-element array of positive integers.

The first element is the minimum length. The second element is the maximum length. The default is [2 40].

RTL Description Rules

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Check for clock enable signals in the generated code (rule CGSL-2.C.C.4), specified as a structure with this field.

FieldDescription
enable

Set to true to minimize clock enables in the generated code and check for clock enable signals after code generation.

Set to false if you do not want to check for clock enable signals in the generated code.

The default is false.

Check for reset signals in the design (rule CGSL-2.C.C.5), specified as a structure with this field.

FieldDescription
enable

Set to true to minimize reset signals in the generated code and check for reset signals after code generation.

Set to false if you do not want to check for reset signals in the design.

The default is false.

Check for asynchronous reset signals in the generated code (CGSL-2.C.C.6), specified as a structure with this field.

FieldDescription
enable

Set to true to check for asynchronous reset signals in the generated code.

Set to false if you do not want to check for asynchronous reset signals in the generated code.

The default is true.

Minimize use of variables (rule CGSL-2.G), specified as a structure with this field.

FieldDescription
enable

Set to true to minimize use of variables.

Set to false if you do not want to minimize use of variables.

The default is false.

Check for length of conditional statements (if-else, case, and loops) that are described separately in a process block or an always block (rule CGSL-2.F.B.1), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check length of conditional statements.

Set to false if you do not want to check the length of conditional statements.

The default is true.

length

Number of conditional statements that are described separately within a process block (VHDL) or an always block (Verilog).

The default is 1.

Check if there are assignments to the same variable in multiple cascaded control regions within the same process block. This check corresponds to CGSL-2.F.B.1.a of the industry standard guidelines, specified as a structure with this field.

FieldDescription
enable

Set to true to check for assignments to the same variable in multiple cascaded control regions.

Set to false if you do not want to check for assignments to the same variable in multiple cascaded control regions.

The default is false.

Check for if-else statement nesting depth (rule CGSL-2.G.C.1a), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check if-else statement nesting depth.

Set to false if you do not want to check if-else statement nesting depth.

The default is true.

depth

Maximum if-else statement nesting depth, specified as a positive integer.

The default is 3.

Check for if-else statement chain length (rule CGSL-2.G.C.1c), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check if-else statement chain length.

Set to false if you do not want to check if-else statement chain length.

The default is true.

length

Maximum length of if-else statement chain, specified as a positive integer.

The default is 7.

Check for multiplier bit width (rule CGSL-2.J.F.5), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check multiplier bit width.

Set to false if you do not want to check multiplier bit width.

The default is true.

width

Maximum multiplier bit width, specified as a positive integer.

The default is 16.

RTL Design Rules

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Check for generated code line length (rule CGSL-3.A.D.5), specified as a structure with the following fields.

FieldDescription
enable

Set to true to check line lengths in generated code.

Set to false if you do not want to check line lengths in generated code.

The default is true.

length

Maximum number of characters per line in generated code, specified as a positive integer.

The default is 110.

Check for non-integer constants (rule CGSL-3.B.D.1), specified as a structure with the following field.

FieldDescription
enable

Set to true to check for non-integer constants.

Set to false if you do not want to check for non-integer constants.

The default is true.