Create and Run a Back-to-Back Test

This example shows how to create and run a back-to-back test, which is also known as an equivalence test. Back-to-back tests compare the results of normal simulations with the generated code results from software-in-the-loop, processor-in-the-loop, or hardware-in-the-loop simulations.

  1. Set the current working folder to a writable folder.

  2. Open the rtwdemo_sil_block model.

    open_system('rtwdemo_sil_block')

  3. To select the component to test, click the Controller subsystem.

  4. To open the Simulink Test tab, in the Apps tab, in the Model Verification, Validation, and Test section, click Simulink Test.

  5. To open the Test Manager, in the Tests tab, click Simulink Test Manager.

  6. To create a test file, in the Test Manager, click New > Test File and save it as B2Btest.mldatx.

  7. In the Test Browser pane, right-click New Test Case 1 and select Delete.

  8. Highlight New Test Suite 1 and then click New > Test for Model Component. The Create Test for Model Component wizard opens.

  9. To specify the Top model and Component to test, fill the fields by clicking the Use currently selected subsystem button next to the Component field.

  10. Click Next to specify how to obtain the test harness inputs. Select Use component input from the top model as test input. This option runs the model and creates the test harness inputs using the inputs to the selected model component.

  11. Click Next to select the testing method. Click Perform back-to-back testing. For Simulation1, use Normal. For Simulation2, use Software-in-the-Loop (SIL).

  12. Click Next to specify the format and where to save the test data. For Specify the format to save the test data, select EXCEL. For Specify the location to save the test data, enter B2BtestData. The Excel file is saved to the current working folder.

  13. Click Done. The test harness and test case are created.

Run the Back-to-Back Test

To run the back-to-back test, click Run.

View the Back-to-Back Test Results

Expand the Results hierarchy in the Results and Artifacts panel. Select Out1:1 under Equivalence Criteria Result. The upper plot shows that the output signals align and the lower plot shows that there is zero difference between the output signals.

See Also

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