Interconnect clock frequency (MHz)

Frequency of the master datapath to the interconnect controller in MHz

Model Configuration Pane: Target hardware resources / FPGA design (mem channels)

Description

Frequency of the master datapath to the interconnect controller in MHz.

Settings

200

Default: 200

Programmatic Use

Parameter:

Type:

Values: 200

Default: 200

Version History

Introduced in R2019a