QSPI Peripheral Configuration

Map QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU

Since R2022b

Description

View and edit the map of peripherals in the Infineon^® AURIX™ model to the hardware peripherals.

Using the Peripheral Configuration tool, you can:

• View and edit configuration parameters for QSPI peripheral block.

• Configure the global parameters. To set the group peripheral, select peripheral in Browser > Peripherals > QSPI. For more, see Map Tasks and Peripherals Using Hardware Mapping.

• Check for any conflicts between peripherals.

×

Open the QSPI Peripheral Configuration

• In the Simulink toolstrip, go to Hardware tab and click Hardware Mapping.

  

Parameters

Global parameters

Enable Tx FIFO event — QSPI transmit FIFO event

off (default) | on

Enables the QSPI transmit FIFO event.

When you select this option, the dialog box displays the Tx FIFO Mode Selection options.

Note

• Enabling this parameter, expect that the data is handled through interrupts. Therefore it is mandatory to use QSPI block (Transfer mode as SPI Transmit) during the events.

• Global parameters for enable Tx FIFO event and Rx FIFO event are not applicable if the QSPI block with Transfer mode is set to SPI transmit and receive.

Enable Rx FIFO event — QSPI receive FIFO event

off (default) | on

Enables the QSPI receive FIFO empty event.

When you select this option, the dialog box displays the Rx FIFO Mode Selection options.

Note

• Enabling this parameter, expect that the data is handled through interrupts. Therefore it is mandatory to use QSPI block (Transfer mode as SPI Receive) during the events.

• Global parameters for enable Tx FIFO event and Rx FIFO event are not applicable if the QSPI block with Transfer mode is set to SPI transmit and receive.

Enable error event — QSPI error event

off (default) | on

Enables the QSPI error event.

Note

Enabling this parameter, expects that the data is handled through interrupts. Therefore it is recommended to use QSPI block (SPI receive or transmit as transfer mode) during the events.

Tx FIFO mode — QSPI transmit FIFO mode selection

Batch mode-1 (default)

This parameter is read-only.

This read-only parameter indicates the Tx FIFO events occur based on Batch mode-1.

Dependencies

To enable this parameter, select the Enable Tx FIFO event parameter.

Tx FIFO threshold — QSPI transmit FIFO threshold

0 (default) | 3 | 4 | ...

Enables the QSPI transmit FIFO threshold limit.

Dependencies

To enable this parameter, select the Enable Tx FIFO event parameter.

Rx FIFO mode — QSPI receive FIFO mode selection

Batch mode-1 (default)

This parameter is read-only.

This read-only parameter indicates the Rx FIFO events occur based on Batch move-1.

Dependencies

To enable this parameter, select the Enable Rx FIFO event parameter.

Trigger source — QSPI trigger source

Software trigger (default) | Hardware trigger

Select the type of trigger source for the QSPI.

Source of hardware trigger — Source of hardware trigger selection

GTM (default) | eGTM

Select the source of hardware trigger for the QSPI.

Dependencies

To enable this parameter, set the Trigger source parameter to Hardware trigger.

Rx FIFO threshold — QSPI receive FIFO threshold

0 (default) | 3 | 4 | ...

Enables the QSPI receive FIFO threshold limit.

Dependencies

To enable this parameter, select the Enable Rx FIFO event parameter.

Serial Clock pin (SCK) — QSPI serial clock pin selection

The default varies based on the module selected (default) | P22_7 | ...

Select the QSPI serial clock pin selection. The list varies based on the module selected.

Serial Data Out pin (SDO) — QSPI serial data out pin selection

The default varies based on the module selected (default) | P20_14 | P22_10 | ...

Select the QSPI serial data out pin selection. The list varies based on the module selected.

Serial Data Input pin (SDI) — QSPI serial data input pin selection

The default varies based on the module selected (default) | P22_6 | P22_9 | ...

Select the QSPI serial data input pin selection. The list varies based on the module selected.

Channel

Module — QSPI Module

0 (default) | 1 | 2 | ...

Select the QSPI module 0 through 7 on the hardware board.

Tx mode — QSPI transmit mode

Continuous (default) | Single transfer

Select the QSPI transmit mode.

• Continuous - This option activates the chip select signal till the data transfer completes.

• Single-transfer - This option deactivates the chip select signal for every data element involved in the data transfer.

Baud rate — QSPI clock baud rate

1000000 (default) | positive scalar integer

Specifies the rate of data communication between the peripherals connected (clock period).

Data heading (Endianness) — QSPI data heading in binary

MSB first (default) | LSB first

Select the QSPI data heading in binary numbers.

• MSB first - the bit furthest to the left (msb) is moved first from SDO pin followed by the subsequent left bits.

• LSB first - the bit furthest to the right (lsb) is moved first from SDO pin followed by the subsequent right bits.

Polarity — QSPI clock polarity

Idle low (default) | Idle High

Select the QSPI clock polarity in idle state.

Phase — QSPI clock phase

Trailing edge (default) | Leading edge

Select the QSPI clock phase.

Enable parity — Enable QSPI clock parity

off (default) | on

Enables the QSPI clock parity.

When you select the Enable parity option, the dialog box displays the Parity option.

Parity — QSPI clock parity

Odd parity (default) | Even parity

Select the QSPI clock parity.

Dependencies

To enable Parity parameter, select the Enable parity parameter.

CS pin — QSPI chip select pin

The default varies based on the module selected (default)

Select the QSPI chip select pin.

Channel — QSPI channel

The default varies based on the module selected (default) | 1 | | ...

This parameter is read-only.

Select the QSPI channel 0 through 13. This read-only parameter indicates the channel corresponding to the CS pin selected.

CS control — QSPI chip select control

Automatic-Hardware controlled (default) | Software controlled

This parameter is read-only.

This parameter is read-only. Select the QSPI chip select control.

CS active level — QSPI chip select active level

Low (default) | High

Select the QSPI chip select active level.

CS lead delay — QSPI CS lead delay

0.0 (default)

Introduces the selected delay between the active edge of the CS pin and the first shift clock edge.

CS trail delay — QSPI CS trail delay

0.0 (default)

Introduces the selected delay between shift clock period of a data block and is followed either by the deactivating edge of CS pin, or a new data block in continuous mode.

CS inactive delay — QSPI CS inactive delay

0.0 (default)

Introduces the selected delay between the end of the last TRAIL phase of a frame.

Version History

Introduced in R2022b