Map Simulation Parameters to Peripheral Configuration Tool

SoC Blockset™ interface blocks, such as PWM Interface and ADC Interface, provide a simulation specification of PWM and ADC behavior. To build and deploy the model to a supported hardware board, the simulation parameters in the interface blocks must be equivalently set in the Hardware Mapping tool. These sections describe the mapping of parameters between the interface block and respective parameter groups in the Hardware Mapping tool.

ADC Parameter Mapping

The ADC Interface block includes several generic parameters that specify the ADC measurement in simulation. When connected to a matching ADC Read block, the Hardware Mapping tool provides an equivalent set of hardware parameters for the specified hardware board.

In the Hardware Mapping tool, set the Simulink block parameter to the ADC Read block that is connected to the ADC Interface block to be mapped. This table shows the relationship between the simulation parameters and the hardware parameters.

ADC Interface Block Parameter Peripheral Configuration ADC Read Parameter Conversion

ADC Interface Block Parameter	Peripheral Configuration ADC Read Parameter	Conversion
Acquisition time (s)	SOC`x` Acquisition window (cycles)	The SOC`x` Acquisition window (cycles) parameter is measured in processor clock cycles. This expression shows how to derive the SOC`x` Acquisition window (cycles) parameter from the Acquisition time (s) parameter. SOC`x` Acquisition window (cycles) = Acquisition time (s) / (1 / SYSCLKOUT) - `1` The SYSCLKOUT parameter is defined in the Hardware Implementation Pane for the given CPU.
Conversion time (s)	Not HW configurable	The Conversion time (s) is implicitly determined by the conversion granularity. For 12-bit conversion: Conversion time (s) = 10.5 x SYSCLKOUT / ADCCLKDIV and for 16-bit conversion: Conversion time (s) = 29.5 * SYSCLKOUT / 5 The SYSCLKOUT and ADCCLKDIV parameters defined in the Hardware Implementation Pane for the given CPU.

Acquisition time (s)

SOCx Acquisition window (cycles)

The SOCx Acquisition window (cycles) parameter is measured in processor clock cycles. This expression shows how to derive the SOCx Acquisition window (cycles) parameter from the Acquisition time (s) parameter.

SOCx Acquisition window (cycles) = Acquisition time (s) / (1 / SYSCLKOUT) - 1

The SYSCLKOUT parameter is defined in the Hardware Implementation Pane for the given CPU.

Conversion time (s)

Not HW configurable

The Conversion time (s) is implicitly determined by the conversion granularity. For 12-bit conversion:

Conversion time (s) = 10.5 x SYSCLKOUT / ADCCLKDIV

and for 16-bit conversion:

Conversion time (s) = 29.5 * SYSCLKOUT / 5

The SYSCLKOUT and ADCCLKDIV parameters defined in the Hardware Implementation Pane for the given CPU.

PWM Parameter Mapping

The PWM Interface block includes several generic parameters that specify the PWM waveform in simulation. When connected to a matching PWM Write block, the Hardware Mapping tool provides an equivalent set of hardware parameters for the specified hardware board.

In the Hardware Mapping tool, set the Simulink block parameter to the PWM Write block that is connected to the PWM Interface block to be mapped. This table shows the relationship between the simulation parameters and the hardware parameters.

PWM Interface Block Parameters	Peripheral Configuration PWM Write Parameters	Conversion
PWM Period	Period (clock cycles)	The Period (clock cycles) parameter is measured in processor clock cycles. This expression shows how to derive the Period (clock cycles) parameter from the PWM Period parameter. Period (clock cycles) = PWM Period x `PWMClockVal` `PWMClockVal` is calculated as: `PWMClockVal` = SYSCLKOUT / (EPWMCLKDIV x HSPCLKDIV x TBCLK) The SYSCLKOUT and EPWM clock divider (EPWMCLKDIV) parameters are defined in the Hardware Implementation Pane for the given CPU.
Counter Mode	Counting Mode	The value of the Counting Mode parameter must match the value of the Counter Mode parameter for equivalent execution in simulation and on hardware.
Sampling Mode	Enable shadow mode Reload CMP`x` register	The sampling mode applies for the all input parameters in simulation. In the generated code, sampling mode can be configured for the individual comparator registers reload conditions (`counter=zero`, `counter is period`, `counter zero or period`)
Dead time (s)	Dead band (cycles)	The Dead band (cycles) parameter is given PWM clock cycles. This expression shows how to derive the Dead band (cycles) parameter from the Dead time (s) parameter. Dead band (cycles) = Dead time (s) x PWMClockVal PWMClockVal is calculated: PWMClockVal = SYSCLKOUT / (EPWMCLKDIV x HSPCLKDIV x TBCLK) The SYSCLKOUT and EPWM clock divider (EPWMCLKDIV) parameters are defined in the Hardware Implementation Pane for the given CPU.
Event trigger mode	ADC start of conversion PWM Interrupt	If the PWM Interface block event signal is connected to an ADC Interface block, then use the ADC start of conversion parameter. If the PWM Interface block event signal is connected to a Task Manager block, then use the PWM Interrupt parameter.
*At `position`* of period** At compare `n` *At compare `n`* `direction` count**	Action on counter=zero Action on counter=period *Action on counter=CMP`x` on `direction`* count**	These parameters can be matched effectively one-to-one by using this conversion of parameter values. `Clear` = `Low` `Set` = `High` `Do nothing` = `NoChange` `Toggle` = `Change`
Phase (degrees)	Enable phase offset Timer phase offset	The Timer phase offset parameter is given in clock cycles and is dependent on the Enable phase offset parameter. This expression shows how to derive the Timer phase offset parameter from the Phase (degrees) parameter. Timer phase offset = PWMClockVal/(360/Phase (degrees) PWMClockVal is calculated as: PWMClockVal = SYSCLKOUT/EPWMCLKDIV/HSPCLKDIV/TBCLK The SYSCLKOUT and EPWM clock divider (EPWMCLKDIV) parameters are defined in the Hardware Implementation Pane for the given CPU.