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ARM Targeting

To generate an embedded C code for the ARM® targeting, you must install the SoC Blockset™ and Embedded Coder® products. The SoC Blockset product provides two workflows for hardware-software co-design on an RFSoC device.

  • Use the SoC Builder tool to guide you through the steps required to build hardware and software executables, load them on an SoC device, and execute.

  • Use the SoC Model Creator (SoC Blockset Support Package for Xilinx Devices) tool to create an SoC model based on the selected reference design for the supported Xilinx® RFSoC devices. Use the created model as a template to design and simulate an FPGA algorithm and processor algorithm. Then, use the SoC Builder tool to build and deploy the system on an RFSoC device.

Use SoC Builder Tool to Deploy SoC Model on SoC Device

Create an SoC system model that consists of an FPGA model reference and a processor model reference. SoC Builder tool generates and deploys a hardware bit file and software application file. For an example on how to capture data by using the SoC Builder tool workflow, see the Transmit and Receive a Tone Using Xilinx RFSoC Device - Part 1 System Design (SoC Blockset Support Package for Xilinx Devices) example.

Use SoC Model Creator and SoC Builder Tools to Create and Deploy SoC Model on RFSoC Device

This workflow enables algorithm and system designers to generate an HDL IP core and integrate it into a fixed reference design for rapid prototyping. Select a fixed reference design and configure it to create an SoC model using the SoC Model Creator tool. Edit the created model to include an FPGA algorithm and processor algorithm. Then, simulate the system and use the SoC Builder tool to generate a bitstream and host I/O model, build a software application, and program the Xilinx RFSoC device. For more information on this workflow, see RFSoC Support for Fixed Reference Design (SoC Blockset Support Package for Xilinx Devices).

For an example on how to capture data by using the RFSoC support for a fixed reference design workflow, see the Transmit and Receive Tone Using Fixed Reference Design Workflow on RFSoC Device (SoC Blockset Support Package for Xilinx Devices) example. This example generates host I/O model and software model.

  • Modify the generated host I/O model to stream your data to and from the hardware or configure the AXI registers, without generating C code.

  • Modify the generated software model to include the software algorithm. Then, use SoC Builder to generate C code and target on the ARM processor.

Which Workflow to Use?

If you are designing an RFSoC application on an RFSoC device and building your application using a fixed reference design, launch the SoC Model Creator tool first. If you are building an application based on the content in the Simulink® model, you can use the to get started quickly, or you can create the whole model from scratch.

See Also

(SoC Blockset Support Package for Xilinx Devices)

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