Yes, as of R2019b you can apply filters to Design Verifier Design Error Detection tests to apply justifications/exclusions by enabling the "Ignore objectives based on filter" option, and specifying a coverage filter in Model Settings.
The coverage filter can be modified to include exclusions applied to all blocks with the same library reference; in this way you can "bulk exclude" dead logic results from analysis by filtering against the library reference.
A description of this workflow and an example are available on the following two documentation pages:
Additional Note: there is an option to apply the filter only for Dead Logic Detection analysis specifically from within the Simulink Coverage toolbox.
Enabling "Make justification filter rules for dead logic" from within the Coverage Results explorer will automatically justify all dead logic identified by Design Verifier. This method does not confirm that the identified dead logic is intended or acceptable, and thus should still be reviewed by the user. This is described in the following documentation page:
Additionally, if you want to check for Dead logic in the Library block itself, you can create a harness for the library block (in the main library model), change the solver to 'Fixed Step' in the generated harness, and perform Design Error Detection checks.