signal over lapping in Down sampler output for ZYNQ FPGA
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I am trying to down sample a 4 MHz signal while the decimated output downsamples the signl in a way that signals of each 1 MHz is appeared in that sameband how can be this output changed dothat all the signlas in the 4 MHz band are represented in 1 MHz
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Bharath Venkataraman
le 17 Juin 2022
0 votes
Are you trying to implement a chaneelizer? If so, here is the behavioral version in DSP System Toolbox and its HDL equivalent.
4 commentaires
muhammad ahmad
le 20 Juin 2022
Modifié(e) : muhammad ahmad
le 20 Juin 2022
Bharath Venkataraman
le 20 Juin 2022
MATLAB Answers is convenient since it has a lot more people looking at questions and you may get your problem resolved sooner.
If you do need support for your questions, I suggest reaching out to MathWorks support. They have resources that may be able to help you.
My earlier question was whether you are implementing a channelizer - I understand that you are using a downsampler.
muhammad ahmad
le 21 Juin 2022
Bharath Venkataraman
le 21 Juin 2022
I may not be the best person to help, so I suggest that you reach out to MathWorks support. They will be able to guide you to the right person.
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