C2000 simulink reduces PWM frequency

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Haadia Farrukh
Haadia Farrukh le 27 Fév 2024
Réponse apportée : MULI le 21 Oct 2024
I set up a model in simulink containing a couple of ADCs which sample signals , a few calculations are done ( 2 PR controllers ) and the output is used as the duty cycle to an epwm . I set up the epwm for 20 kHz ( 50 microseconds ) . The ADCs also sample at the same frequency.
First I tested a simple - sample a single signal via 1 ADC and then output from PWM. This worked perfectly , I get a 20 KHz PWM signal and after filtering , get my input signal. Then I tried my model, which I though was working fine but then I noticed the pwm had the frequency of about 6 kHz ! I hadn't changed any settings!
Is there a reason this happens ? Does my model not meet timing , so matlab slows down the system?
Additional Info : I had a sine block , which I replaced a buffer containing sine values and now its outputting a 20 kHz wave again.

Réponses (1)

MULI
MULI le 21 Oct 2024
Hi Hadia,
I understand that you are experiencing an issue where PWM signal is expected to generate at frequency of 20kHz but outputting at a lower frequency.
The below listed could be the possible reasons for PWM frequency drop
  • When you have multiple blocks (like ADCs, PR controllers, and PWM) operating at the same sample rate, the overall execution time of your model may exceed the allowed period for the PWM output.
  • This can cause the system to effectively lower the PWM frequency to accommodate the longer execution time.
  • You mentioned that replacing the sine block with a buffer resolved the issue, it suggests that the sine block may have introduced additional computational delays, affecting the model’s timing.
To resolve this issue, you can follow the below steps:
  • Ensure that all components in your model are set to the same sample time (0.05 ms for 20 kHz). If any block has a different sample time, it can lead to timing mismatches, resulting in unexpected behavior.
  • Use the Fixed-Step solver in your model configuration to ensure consistent sample times across blocks.
  • Use the Simulink Profiler to analyze the execution time of different blocks and identify any that may be causing delays. You can refer to the below documentation link for more information on Simulink Profiler. https://www.mathworks.com/help/releases/R2023a/simulink/slref/simulinkprofiler.html
You can also refer to this example that demonstrates using ADC blocks to sample analog voltage and control PWM duty cycles.
Hope this answers your query!

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