[Zynq ad9361 fmscomms2 qpsk co-design] How to increase the sampling rate

Hello,

I'm working for a project to streaming video base on Zynq and Fmscomms2 hardware, we base on the hardware-software co-design example

https://www.mathworks.com/help/supportpkg/xilinxzynqbasedradio/ug/zedboardandfmcomms234transmitter.html Now I'm able to streaming video base on this example but the bit-rate is slow. I found that its because the baseband sample rate of this example is quite slow (520kHz). I try to increase it to 2MHz and its ok. But for 4MHz or 8MHz which is fit with my requirement The Tx DMA underflow occurs many times. I think I should tuning some parameter to do that. I use all the default parameter of example and just tuning the

RadioFrontEndSampleRate

to 8MHz, the Schedule of this example is DMA transmit interrupt, its mean it will push data immediately after DMA done, so I don't see why underflow can happen, DMA speed is not enough ?

I try to increase the RadioFrontEndSampleRate to 8MHz and probing the sample time of interface model and simulation model and the sample time of interface model still lower than sample time of simulation model.

The sample time is 0.0024 x 10000 and we packing 50 Sample so the it is 0.000048 x 200.

Same with simulation model. (0.000048) so why the underflow happens ?

Plz help, We stucking in this point for a week.

[Neil MacEwen]

Hi,

You should be able to modify the sampling rates by updating the SimParams.RadioFrontEndSampleRate value in the initialisation scripts, zynqRadioQPSKTxFPGAAD9361AD9364SL_init.m and zynqRadioQPSKRxFPGAAD9361AD9364SL_init.m. By changing the value to 8e6, the red rate in the model should update to 0.00125.

In your model, you have it set up to give the transmitter block 10,000 samples every 0.0024 seconds. This is equivalent to a baseband sample rate of 10000/0.0024 = 4.167MHz. If you have your transmitter baseband sample rate set up to 8MHz, you are not giving it enough data and that is why you are getting underflows.

Thanks,

Neil

[hoang viet]

Hello Neil,

Sorry for typing wrong. I set the base band sample rate to 4MHz in 2 script you said not 8MHz, so the sample time is matched in simulation model and interface model but underflow still occurs.

[Neil MacEwen]

I assume you set your sample rate to 4.167MHz, rather than exactly 4MHz, given the frame rate in the model.

The underflow flag will assert when not enough data is being given to the DMA. This can happen due to a couple of reasons:

1. The model timing is not correct, and you are not producing enough data in time for the DMA.
2. The ARM is unable to keep up with the desired timing.

The second item is possibly happening here. You will need to consider whether you are trying to get the ARM to do too much. What do you have in your model that is creating the video data? Can the ARM generate the data quickly enough to feed your 4MHz rate? It is possible that the ARM physically cannot do that.

You can try a couple of things.

1. Deploy the software application to the board, and do not run in external mode. External mode contains some overhead that may affect your run. See this section of the QPSK example documentation for more info.
2. Change the Build Configuration to compile for "faster runs" on the Code Generation tab of the Configuration Parameters.

Good luck!

Neil

[Ejaz. S]

Dear Neil,

I am also facing the similar problem. In a software generated model, my baseband sample rate is 2MHz and I am generating "Hello World 0xx" message at a rate of 7kbps, after repeat block which is 254x and adding a buffer I match the rate to 2MHz. Although it solves the problem in an Accelerator mode, however, when used in an external mode or deployed mode the underflows occur frequently and the spectrum becomes bursty. It appears and disappears. Furthermore, I have also tried to build for faster runs yet no improvement. I think many users are facing the same problem. Actually the capability of ARM is not clear and how DMA is configured to control AXI interface is not obvious. Can you shed some light over this issue? Thanks.

[Saqib Ali]

Hi Neil I would like to add a similar issue which I am facing . I am trying to get a frame of 104 int16 from the PL to arm . When I keep the buffer to a multiple of the input frame things go fine, but when I make the arm buffer equal to 4000 which is not a multiple I get missing in the received data . Please note that I am using the ipcore generation which uses the axi stream and DMA here. Any comments or suggestions on this please ?