MathWorks HDL Coder Team

MathWorks

Last seen: 2 mois il y a | Actif depuis 2020

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A soumis

HDL Coder Self-Guided Tutorial
Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.

2 mois il y a | 87 téléchargements |

4.9 / 5

A soumis

HDL Coder Support Package for Intel FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Intel FPGA and SoC devices

6 mois il y a | 17 téléchargements |

2.7 / 5

A soumis

HDL Coder Support Package for Xilinx FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Xilinx FPGA and SoC devices

6 mois il y a | 57 téléchargements |

3.4 / 5

A soumis

HDL Coder Evaluation Reference Guide
Getting started guide for learning and evaluating HDL Coder

environ un an il y a | 42 téléchargements |

4.9 / 5

A soumis

HDL Coder Support Package for Xilinx RFSoC Devices
Generate code for the FPGA portion of RFSoC devices

plus d'un an il y a | 8 téléchargements |

5.0 / 5

A soumis

Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware
Design and prototype vision systems using Xilinx Zynq-based hardware

plus d'un an il y a | 14 téléchargements |

3.7 / 5

A soumis

HDL Coder Support Package for Xilinx FPGA Boards
Generate and deploy HDL code for Xilinx development boards

plus d'un an il y a | 16 téléchargements |

4.5 / 5

A soumis

HDL Coder Support Package for Intel FPGA Boards
Generate and deploy HDL code for Altera development boards

plus d'un an il y a | 12 téléchargements |

4.6 / 5

A soumis

HDL Coder Support Package for Microchip FPGA and SoC Devices
Generate code for Microchip FPGAs and the FPGA portion of SoC Devices

environ 3 ans il y a | 5 téléchargements |

0.0 / 5

Réponse apportée
HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Refer to the following External Bug Report for a resolution to this issue: https://www.mathworks.com/support/bugreports/2656440...

environ 3 ans il y a | 5

| A accepté

Question

HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Since returning to the office in 2022, I have been unable to use HDL Workflow Advisor with Xilinx Vivado. I see the following er...

environ 3 ans il y a | 2 réponses | 5

2

réponses

Réponse apportée
Generate C code for HLS?
While HLS does take C/C++ as an input, it typically requires some amount of hardware specification to successfully generate HDL....

environ 4 ans il y a | 0

| A accepté

Question

Generate C code for HLS?
Can I generate C code from MATLAB and Simulink and then feed it into a high-level synthesis (HLS) tool to generate HDL?

environ 4 ans il y a | 2 réponses | 0

2

réponses

Réponse apportée
Does HDL Coder support the VHDL fixed-point and floating-point packages?
No. To ensure full portability and numerical consistency with MATLAB rounding and saturation, HDL Coder generates this functiona...

plus de 4 ans il y a | 0

| A accepté

Question

Does HDL Coder support the VHDL fixed-point and floating-point packages?
Does the VHDL code generated by HDL Coder use the IEEE VHDL fixed-point or floating-point packages (IEEE.fixed_pkg.all, IEEE.flo...

plus de 4 ans il y a | 1 réponse | 0

1

réponse