Réponse apportée
Is there a Rand() function alternative for HDL Coder?
Please check the attached example of uniform rand number generation using HDL Coder native floating point code generaiton featur...

presque 6 ans il y a | 0

Réponse apportée
Struct in HDL Function
Great to know this. Thanks for sharing.

presque 6 ans il y a | 0

| A accepté

Réponse apportée
'Failed aType != nullptr' error during HDL code generation
The error is resolved in R2018b release.

presque 6 ans il y a | 0

Réponse apportée
Adding of two signals and convert into vhdl
If you are using autoamted floating point to fixed point conversion tool please share the testbench. https://www.mathworks.com/...

presque 6 ans il y a | 0

Réponse apportée
importhdl vector index operation
Please share functional verilog module to diagnose the error.

presque 6 ans il y a | 0

Réponse apportée
Does the Specialized Power Systems toolbox work with HDL workflow advisor
SPS models need to be manually converted to HDL Coder compatible fixed-point / single / double precision blocks with underlying ...

presque 6 ans il y a | 0

Réponse apportée
Struct in HDL Function
You may find this example useful. web(fullfile(docroot, 'fixedpoint/gs/manually-convert-a-floating-point-matlab-algorithm-to-fi...

presque 6 ans il y a | 0

Réponse apportée
How to serialize vector data for HDL coder.
You can find some common techniques to create buffered data in this example. https://www.mathworks.com/help/hdlcoder/ug/image-e...

presque 6 ans il y a | 0

Réponse apportée
matlab function block for HDL generate
HDL Coder automatically infers clock, clocken, reset from the model. The inputs to MATLAB function block are pure data inputs. ...

presque 6 ans il y a | 0

Réponse apportée
hdl coder model checker output latetency and ulp error warning
These are messages informing about blocks that introduce latency. In case you have such blocks in feedback loops you need to tak...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
Fixed-Point Designer tells me that "Magnitude-Angle to Complex" Block is not supported. Why?
This issue is resolved in R2016b release.

presque 6 ans il y a | 0

Réponse apportée
Simulink Spectrum Analyzer shows noise floor below max SQNR
https://www.mathworks.com/help/dsp/ref/spectrumanalyzer.html There are multiple settings that could affect the observed noise f...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
errors with HDL verification # very with HDL test bench
What is the release you are currently running into this error? It looks like you are running into a HDL code generation issue. ...

presque 6 ans il y a | 0

Réponse apportée
how translate stateflow variable to hdl std_logic_vector(0 to 7)
>> type compBoolVector.m function y = compBoolVector(u, v) y = all(u == v); >> >> a = true(1, 10); b = a; % create so...

presque 6 ans il y a | 0

Réponse apportée
how translate stateflow variable to hdl std_logic_vector(0 to 7)
HDLCoder does not currently support such customization. Fixed Point types generate DOWNTO syntax, and arrays including array of ...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
Is it possible to generate HDL code (VHDL) of a Simulink variant reference model in a way that the "active variant" is selectable through VHDL generics?
HDL Coder compiles away all the inactive variants and generates code only for the active variant. Can you share a sample model a...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
HDL Code Generation Erros
>> makehdl(gcb) ### Generating HDL for 'Pattern_Detector_19a/Subsystem'. ### Using the config set for model Pattern_Detector_1...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
HDL Code Generation Error
See resolution in https://www.mathworks.com/matlabcentral/answers/606331

presque 6 ans il y a | 1

| A accepté

Réponse apportée
HDL Code Generation Erros
HDLCoder does not support Stateflow chart configured with floating-point types. Based on your application you do not need s...

presque 6 ans il y a | 1

Réponse apportée
HDL coder not loading simulation tool
>> help hdlsetuptoolpath hdlsetuptoolpath Setup synthesis tool path and environment variables in current MATLAB session. ...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
DE-10 Nano development kit
Can you consider using the example and extend to DE-10 Nao Kit? https://www.mathworks.com/help/hdlcoder/ug/define-and-register-...

presque 6 ans il y a | 0

Réponse apportée
Timed out on waiting for AXI write response.
This is insufficient info to answer the question. Someone to answer this question would need to know the following details at th...

presque 6 ans il y a | 0

Réponse apportée
HDL Coder Sharing alters wordlength of multiplier
In hardware multipliying two inputs of size 'n' and 'm' would result in full precision output of 'n+m'. The result is further tr...

presque 6 ans il y a | 0

| A accepté

Réponse apportée
HDL FIFO and (not so) algebraic loop errors
Can you share the model with the algberaic loop error? What version of MATLAB and HDL Coder are you currently using? Thanks.

presque 6 ans il y a | 1

Réponse apportée
from HDL to Matlab
You can consider using HDL cosimulation block in Simulink. https://www.mathworks.com/help/hdlcoder/ug/hdl-verifier-cosimulation...

presque 6 ans il y a | 0

Réponse apportée
Generate HDL error: Reference to non-existent field 'hasVariantError'.
Thanks for reporting this issue. An updated check compatibility of the Simulink code generation folder is added during HDL code ...

presque 6 ans il y a | 1

Réponse apportée
Custom Convolution neural network model code conversion for FPGA
https://www.mathworks.com/products/deep-learning-hdl.html Deep Learning HDL Toolbox™ provides functions and tools to prototype ...

presque 6 ans il y a | 0

Réponse apportée
State vector PWM on FPGA
Can you check if these links are of help? Deploy Simscape Buck Converter Model to Speedgoat IO Module Using HDL Workflow Script...

presque 6 ans il y a | 0

Réponse apportée
HDL coder and verifier: Xilinx Arty S7-25 vs S7-50
The generated HDL code from HDL Coder and HDL Verifier workflows are not tied to specific hardware and wide range of FPGA device...

presque 6 ans il y a | 1

Réponse apportée
Can anyone help me with the name of this block?
web(fullfile(docroot, 'simulink/slref/ratetransition.html')) NoOp --> Does nothing / Copy

presque 6 ans il y a | 0

Charger plus