Key Features

• Automatic generation of IEC 61131-3 Structured Text and Ladder Diagrams
• IDE support, including 3S-Smart Software Solutions CODESYS®, Rockwell Automation® Studio 5000, Siemens® TIA Portal, Omron® Sysmac® Studio, and PLCopen XML
• Simulink® support, including reusable subsystems, PID controller blocks, and lookup tables
• Stateflow® support, including state machines, graphical functions, and truth tables
• MATLAB® support, including if-else statements, loop constructs, and math operations
• Support for multiple data types, including Boolean, integer, enumerated, and floating-point, as well as vectors, matrices, buses, and tunable parameters
• Test-bench creation
From model to Structured Text to application. Simulink PLC Coder generates Structured Text from your model, which an IDE can deploy to your industrial control system.

Support for Third-Party IDEs

Simulink PLC Coder™ generates Structured Text in a variety of file formats used by third-party IDEs, including:

• 3S-Smart Software Solutions CODESYS
• B&R Automation Studio™
• Beckhoff® TwinCAT®
• KW-Software MULTIPROG®
• Omron Sysmac Studio
• Phoenix Contact® PC WORX™
• Rexroth IndraWorks
• Rockwell Automation® RSLogix™ 5000 and Studio 5000
• Siemens SIMATIC STEP 7 and TIA Portal
• IDEs that use generic ASCII files
• PLCopen XML

Simulink PLC Coder generates Ladder Diagrams in a variety of file formats used by third-party IDEs, including:

• 3S-Smart Software Solutions CODESYS
• Rockwell Automation RSLogix 5000 and Studio 5000
• PLCopen XML

Generating Structured Text and Ladder Diagrams

In Simulink, you can generate Structured Text, import it into an IDE, and verify the generated code in a test bench running on the IDE’s emulator. In MATLAB, you can invoke the plcgeneratecode command in scripts to generate Structured Text using an automated, repeatable build process.

With support for more than 180 Simulink blocks, all Stateflow constructs, and many MATLAB functions, Simulink PLC Coder can fully implement your control system models comprising feedback loops, mode and state logic, and math-intensive algorithms.

In Stateflow, you can generate Ladder Logic in PLC Open XML format, import them into an IDE, and view them as Ladder Diagrams. You can also validate the generated Ladder Diagrams by generating and executing the test bench running on the IDE’s emulator. In MATLAB, you can invoke the plcgenerateladder command in scripts to generate Ladder Diagrams using an automated, repeatable build process.

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Code Optimization

Simulink PLC Coder provides optimizations that reduce the memory size and increase the execution speed of the generated Structured Text and Ladder Diagrams. These optimizations include:

• Expression folding
• For-loop fusion
• Inline parameters
• Signal storage reuse
• Subsystem reuse

Your optimization needs can change with your project’s development phase. For example, during rapid prototyping, you might place parameters in global memory for tuning or calibration; during a subsequent production build, you might generate parameters with their literal numeric values using the Inline parameters option to produce more optimized code.

Example of optimized Structured Text. Simulink PLC Coder generates optimized, well-integrated code for Simulink, Stateflow, and MATLAB functions.

Commenting, Tracing, and Documenting Code

Simulink PLC Coder inserts comments and user-specified block descriptions in the Structured Text so that you can trace text back to the model. Built-in identifier naming control lets you create unique identifiers that preserve object names and signal names in the model. These capabilities help you conduct more efficient code reviews and document how the model was implemented.

Simulink PLC Coder creates a code generation report for examining the generated code for your Simulink model. The report includes a code interface description, traceability report, and display of generated source files and code. The report also contains static code metrics that list information such as lines of code, global variables, global constants, and function block information.

Bidirectional links between the model and the generated code make it easy to navigate between every line of code and its corresponding Simulink model element, including subsystems, blocks, MATLAB code, and Stateflow charts and transitions. You can click a link to highlight the corresponding model element or line of code, facilitating code reviews and debugging.

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Code Test and Verification

Simulink PLC Coder can simulate the model prior to Structured Text and Ladder Diagram generation and package the results into a test harness that is generated with the algorithm code. The test harness serves to verify that model simulation behavior and Structured Text execution results match within an acceptable tolerance. You can then execute the test and analyze the results using your IDE or PLC device.

You can also use Simulink Coder™ to generate C/C++ code from your plant model, and use Simulink Real-Time™ and Speedgoat target computer hardware to run the plant model in real time. By connecting the PLC, which is running the controller, with a Speedgoat target computer, which is running the plant model, you can execute hardware-in-the-loop (HIL) simulation to further verify the behavior of your controller algorithm running on the PLC prior to commissioning.

A test harness, generated to verify that the model simulation results match the Structured Text and Ladder Diagram execution results with an acceptable tolerance.