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TLM Component Generation

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TLM Mapping

ParameterDescription

Socket Mapping

Type of TLM socket for input data, output data, and control

Memory Map Type

Execution of external mode task in generated code within background thread

Auto-Generated Memory Map Type

Type of addressing scheme to be automatically generated

Import IP-XACT File

Memory map of the TLM component from an imported file

Include a command and status register in the memory map

TLM component commands such as "reset" and "start"

Include a test and set register in the memory map

Controls access to a shared TLM target device

Include tunable parameter registers in the memory map

Read/write tunable parameter

TLM Processing

ParameterDescription

Algorithm Step Function Execution

Type of function execution trigger

Algorithm step function timing (ns)

Time in nanoseconds for modeling the algorithm execution time

Create an interrupt request port on the generated TLM component

Interrupt signal to be added to the generated TLM component

TLM Timing

ParameterDescription

Single write transfer or the first write transfer in a burst transaction (ns)

Time in nanoseconds for the TLM component to execute a single write transfer or the first write transfer in a burst transaction

Subsequent write transfers in a burst transaction (ns)

Time in nanoseconds for modeling the algorithm execution time

Single read transaction or the first read transfer in a burst transaction (ns)

Time in nanoseconds for the TLM component to execute a single read transaction or the first read transaction in a burst transaction

Subsequent read transfers in a burst transaction (in ns)

Time in nanoseconds for the TLM component to execute a subsequent read transfer in a burst transaction

TLM Testbench

ParameterDescription

Generate testbench

Generates standalone SystemC™ testbench

Generate verbose messages during testbench execution

Generates verbose messages during testbench execution

Run-time timing mode

Timing mode to be used by the generated testbench and TLM component

Input buffer triggering mode

Data moved from the input register to the execution buffer

Output buffer triggering mode

Data moved from the results buffer to the output register

Component Verification

Verify the generated TLM component

TLM Compilation

ParameterDescription

SystemC include path

SystemC

SystemC library path

Location of the library directory in your SystemC installation

SystemC library name

Name of the SystemC library in your SystemC installation

TLM include path

Location of the TLM include directory in your TLM installation

SCML include path

SCML include path

SCML library path

SCML library path

SCML library name

SCML library name

SCML logging library name

Name of the SCML logging library

Operating System

Target operating system for the generated TLM code

Toolchain

Compiler

User-defined tag for TLM component names

Additional text for your TLM component class name identifier, the input and output data structures, and the directory to place the generated code