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SystemVerilog DPI Pane

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ParameterDescription

Customize generated SystemVerilog code

Choice to customize the generated SystemVerilog code

Source file template:

File name and location of the template you want to use for customizing the generated SystemVerilog code

Report run-time error

Select this parameter to export run-time errors from a Simulink® execution to the DPI and UVM simulation environment.

Severity

Severity for run-time errors

Generate test bench

Generates a testbench for the DPI component

Floating point tolerance

Numeric tolerance when comparing floating point values from Simulink output with the DPI component outputs running in the HDL simulator

HDL simulator

HDL simulator to use when simulating the testbench in MATLAB®

Generate access function to test point

Type of test point access functions to generate in the SystemVerilog DPI component

Ports data type

SystemVerilog data type that will be used for ports that have fixed-point data

Connection

How signals are connected when the module is instantiated

Composite data type

How the SystemVerilog ports are generated when your Simulink model includes a port which is a Nonvirtual bus or a complex data type

Scalarize matrix and vector ports

Choice for how ports are generated when your Simulink model includes a port which is an array or matrix data type

Component template type

Template for SystemVerilog DPI generation