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Segmented DAC

Convert large digital input to analog signal using arrangement of smaller DACs

  • Library:
  • Mixed-Signal Blockset / DAC / Architectures

  • Segmented DAC block

Description

The Segmented DAC block converts a large digital signal into analog output by splitting it over several smaller DACs. The Segmented DAC block supports up to five binary-weighted segmented DACs.

Ports

Input

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Digital input signal to DAC, specified as an integer.

If the Input polarity parameter is set to Bipolar, the allowed range of the signal is [−2NBits-1, 2NBits-1].

If the Input polarity parameter is set to Unipolar, the allowed range of the signal is [0, 2NBits-1].

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | fixed point

External clock to start conversion, specified as a scalar. The digital to-analog conversion process starts at the rising edge of the signal at the start port.

Dependencies

To enable this port, select Use external start clock.

Data Types: double

Output

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Converted analog output signal, returned as a scalar.

Data Types: double

Parameters

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Define the polarity of the DAC input data. Set Input polarity to:

  • Unipolar when the digital input can only be positive.

  • Bipolar when the digital input can be both positive and negative.

Programmatic Use

Block parameter: Polarity
Type: character vector
Values: Unipolar | Bipolar
Default: Unipolar

Select to connect to an external start conversion clock. This option is selected by default. If you deselect this option, a Sampling Clock Source block inside the Segmented DAC block is used to generate the start conversion clock.

Frequency of the internal start conversion clock, specified as a real scalar in Hz. The Conversion start frequency parameter determines the conversion rate at the start of conversion.

Dependencies

To enable this parameter, deselect Use external start clock.

Programmatic Use

Block parameter: StartFreq
Type: character vector
Values: real scalar
Default: 1e6

The reference magnitude of the DAC output, specified as a real scalar in volts. Reference (V) is one least significant bit (LSB) greater than the maximum achievable output.

Programmatic Use

Block parameter: Ref
Type: character vector
Values: real scalar
Default: 0.5

The difference between the analog output for code zero and analog zero in an unimpaired DAC, specified as a real scalar in volts.

Programmatic Use

Block parameter: Bias
Type: character vector
Values: real scalar
Default: 0

The time required for the output of the DAC to settle to within some fraction of its final value, specified as a nonnegative real scalar in seconds.

Programmatic Use

Block parameter: SettlingTime
Type: character vector
Values: real scalar
Default: 2e-7

The tolerance allowed for calculating settling time, specified as a positive real scalar in LSB. The output of the DAC must settle within the Settling time tolerance (LSB) by Settling time (s).

Programmatic Use

Block parameter: SettlingTimeTolerance
Type: character vector
Values: positive real scalar
Default: 0.5
Segment settings

The topology of the base DAC for the segment. You can only use a Binary Weighted DAC.

Number of physical input bits for the DAC segment, specified as a real scalar greater than 2. For the first two DAC segments, the default value of Bits is 4. For subsequent segments, the default value is 2.

Shift quantization steps by the value you provide in Offset error parameter, specified as a real scalar.

Unit of offset error, specified as LSB, full scale (FS), or percentage full scale (%FS).

Note

The full scale range of the converter is defined as the difference between the last and first code on the +0.5 LSB compensated transfer curve. In a +0.5 LSB compensated transfer curve, first code is 0.5 LSB wide while the last code is 1.5 LSB wide. The input values must be considered within the full scale range of the converter.

Note

LSB is calculated by the equation LSB = Full scale range of converter2Nbits.

Error in the slope of the DAC transfer curve, specified as a real scalar.

Unit of gain error, specified as LSB, full scale (FS), or percentage full scale (%FS).

Note

The full scale range of the converter is defined as the difference between the last and first code on the +0.5 LSB compensated transfer curve. In a +0.5 LSB compensated transfer curve, first code is 0.5 LSB wide while the last code is 1.5 LSB wide. The input values must be considered within the full scale range of the converter.

Note

LSB is calculated by the equation LSB = Full scale range of converter2Nbits.

Click to add a new DAC segment with default values. Currently you can add up to five DAC segments to the Segmented DAC block.

Click to add a new DAC segment by duplicating a selected segment. Currently you can add up to five segments to the Segmented DAC block.

Click to delete the selected DAC segment from the Segmented DAC block.

Version History

Introduced in R2021a