Software and Task Management on Processor

The processor system in this SoC application reads data from the external memory following a write from the FPGA to that memory. Since FPGA writes and interaction with external memory are asynchronous, the processor uses an event-driven task to read from memory. The software also manages a register on the FPGA that specifies a multiplication factor to be used in the FPGA algorithm.

Processor Model

  1. Open a new Simulink® model. Save the model as soc_hwsw_proc.slx into a new subfolder, named processor, in the project folder. Add the soc_hwsw_proc.slx model to the project.

  2. In Simulink, configure the soc_hwsw_top.slx model to as an SoC application. On the Apps tab, under Setup to Run on Hardware, clickSystem on Chip (SoC).

  3. In the System on Chip (SoC) pop-up window, select Hardware Board > Xilinx Zynq ZC706 evaluation kit. Click Finish.

    Note

    The processor model must use the same hardware board and solver configuration parameter settings as the top level model.

  4. In the model, using a Function-Call Subsystem block, Asynchronous Task Specification (Simulink Coder) block, Inport block, and Outport blocks, create the following system.

  5. In the dataTask block dialog mask, check Signal Attributes > Output function call to expose a function call port on the outside model.

  6. In the Asynchronous Task Specification block dialog mask, set Task priority to 50.

    Note

    The task priority of the Asynchronous Task Specification block must match the priority of task in the Task Manager block driving this task.

Task Processing

The Processor Algorithm Wrapper subsystem reads data from the external memory only after each write to the external memory by the FPGA.

  1. Open the Processor Algorithm Wrapper block.

  2. Using a Stream Read block, Constant block, Data Type Conversion block, and Subsystem blocks, create the following model.

  3. Open the Stream Read block dialog mask. Set Number of buffers to 6.

  4. Open the Data Type Conversion block dialog mask and set Output data type to uint16.

  5. The Processor Algorithm subsystem serves as a base to develop your own processing algorithm.

  6. Open the Register Channel Write subsystem block.

  7. Add a Register Write block to create the following model.

  8. Open the Register Write block dialog mask. Set Device name to /dev/mwsinewavegenerator_ip0 and Offset address to hex2dec('100').

Top Model

  1. In the project folder, open the model soc_hwsw_top.slx.

  2. Add a Subsystem block into the Processor area and label the block Processor.

  3. In the Processor subsystem, using the Task Manager block and Model block, create the following system.

  4. Open the Model block dialog mask and set Model name to soc_hwsw_proc.slx.

  5. Open the Task Manager block dialog mask. Set the task Name to dataReadTask and set the Priority to 50. In the Simulation tab, set the Mean, Min, and Max to 8e-05. Click OK.

See Also

Topics