Modeling and Code Generation Using Control Law Accelerator (CLA)
The control law accelerator (CLA) is a coprocessor available with the TI C2000™ processor that allows parallel processing. Utilizing the CLA for time-critical tasks frees up the main CPU to perform other system and communication functions concurrently.
C2000 Microcontroller Blockset provides two workflows to model CLA in Simulink®.
Modeling and code generation of CLA using subsystem
Multiprocessor modeling of CLA using model reference
Modeling and Code Generation of CLA Using Subsystem
Using subsystem workflow, you can generate and deploy the executable on the processor having CLA. For more information, see Overview of CLA Configuration for C2000 Processors Using Subsystem.
The code generated requires less RAM (memory).
Use the C28x CLA Task block to trigger a CLA task. The block runs the downstream function-call subsystem on the CLA.
In subsystem workflow, the data must be configured in a memory accessed by CLA using Embedded Coder®. For more information, see CLA LSRAM Memory Configuration
The IPC blocks cannot be used to transfer data between CPU and CLA in a subsystem. For more information, see Data Exchange Between CLA and C28x CPU
Multiprocessor Modeling of CLA Using Model Reference
Using CLA model reference workflow, you can simulate tasks according to the task priorities configured. For more information, Modeling Control Law Accelerator (CLA) Using Model Reference.
The algorithm within CLA is modelled using model reference.
A C2000 processor with a CLA coprocessor consists of a CLA Task Manager block and reference Model blocks containing the tasks for execution on each processor in the system. The tasks are configured using Hardware Mapping.
Data communication between CPU and CLA requires Interprocess Data Read, Interprocess Data Write, and Interprocess Data Channel blocks. For more information, see Link Task Execution Using Interprocess Data Channels.
The memory configuration is taken care automatically.
The code generated requires more RAM (memory) compared to the subsystem CLA modeling. You can configure the local shared RAM (LSRAM) as CLA program and data memory. For more information, see CLA LSRAM Memory Configuration.
See Also
Overview of CLA Configuration for C2000 Processors Using Subsystem | Modeling Control Law Accelerator (CLA) Using Model Reference