From MATLAB to Optimized RTL using HDL Coder and AMD Vitis HLS

Overview

In this webinar, experts from MathWorks and AMD will discuss an advanced workflow which streamlines the implementation of MATLAB algorithms in FPGA and SoC hardware. We will demonstrate how HDL Coder is used to convert MATLAB code into synthesizable C++ code optimized for AMD Vitis HLS, which then generates RTL targeted to AMD FPGAs and Adaptive SoCs.

Don't miss this opportunity to learn about cutting-edge techniques that streamline the FPGA and SoC design process and enhance the quality of implementations starting from MATLAB.

Highlights

Viewers will gain insights into

• Developing a MATLAB floating-point design and testbench
• Transitioning a floating-point design to a fixed-point representation
• Generating synthesizable C++ code targeted to AMD Vitis HLS
• Generating optimized RTL for AMD FPGAs and Adaptive SoCs

About the Presenters

Noam Levine

Partner Management, MathWorks

Noam Levine is a Principal Partner Manger at MathWorks, focused on the development and promotion of hardware-targeted, application-based workflows. Prior to joining MathWorks in 2008, Noam spent over 16 years in the semiconductor industry in a variety of marketing and application engineering roles. He holds an M.S.E.E. from Northeastern University and a B.S.E.E. from Boston University.

Satish Kurahatti

Product Management, MathWorks

Satish Kurahatti is a Principal Product Manager at MathWorks leading HDL, FPGA/SoC & ASIC solutions. He has been at MathWorks for more than 10 years in different roles and previously worked at Amazon Web Services within EC2 group leading EDA vertical and Arm-based Graviton processors. Satish has a master’s degree in electrical engineering from the State University of New York at Buffalo and an MBA from the Stephan M. Ross School of Business at the University of Michigan Ann Arbor.

Udayan Sinha

Product Marketing, AMD

Udayan Sinha is Senior Manager, Product Marketing @ AMD. His focus is enabling developers to leverage the Vitis Unified Software Platform for applications such as High-Performance DSP on AMD Versal™ AI Engine technology. Previously, Udayan held roles as Software Product Manager for multiple audio DSP-focused companies. Udayan holds a BSEE from the University of California, Davis.