Add and register a target interface
registers a target interface to an
hdlcoder.ReferenceDesign object. Use the
registered target interface to interact with the generated deep learning processor IP core by
interfaceType— Target interface type
Target interface type, specified as a string or character vector.
To register a JTAG target interface to your reference design, your reference design must meet these requirements.
The reference design must include JTAG MATLAB as AXI Master IP.
The JTAG MATLAB as AXI Master IP must be one of the masters to the AXI4-Slave interface in the reference design.
The JTAG MATLAB as AXI Master IP must have access to the same memory as the AXI4-Master interfaces in the reference design.