Visualizing Multiple Signals Using Logic Analyzer
Visualize multiple signals of a programmable FIR filter by using a logic analyzer. For more information on the model used in this example and how to generate HDL code from the model, see Programmable FIR Filter for FPGA.
Model Programmable FIR Filter
Open the example model by using the Open Model button on the Programmable FIR Filter for FPGA page.
This model contains a programmable FIR filter that has two sets of coefficients. One set of coefficients has a lowpass response and the other has a highpass response. The Host Behavioral Model subsystem alternately loads the lowpass coefficients and then the highpass coefficients by using the memory interface on the Programmable FIR (Memory Interface) subsystem. The model generates input chirp data and filters the data. The Programmable FIR(Memory Interface) subsystem contains a Discrete FIR Filter block from the DSP HDL Toolbox™ library.
Run the example model and open the Scope block. The scope displays the input data, the write enable signal that indicates when the filter coefficients switch from highpass to lowpass, and the filter output with its accompanying valid signal.
Use the Logic Analyzer
The Logic Analyzer enables you to view many signals in one window. It also makes it easy to detect signal transitions.
The signals of interest (coefficient write interface, filter input and output and control signals) are marked for streaming in the model. Click the streaming button in the toolbar and select Logic Analyzer.
The Logic Analyzer displays waveforms of the selected signals.
Modify the Display
In the Logic Analyzer, you can modify the height of all the displayed channels, and the spacing between the channels. Click the Settings button. Then, modify the default height and spacing for each wave. Click Apply to show the new dimensions in the background.
To zoom in on the waveform, click the Zoom In Time button in the ZOOM & PAN section of the toolbar. Your cursor becomes a magnifying glass. Then click and drag to select an area on the waveform.
The Logic Analyzer now displays the time span you selected.
You can also control the display on a per-waveform basis. To modify an individual waveform, double-click the signal, select the signal, then click the WAVE tab to modify its settings.
coeff signal in signed decimal mode. The conversion
uses the fractional and integer bits as defined for this signal in your model.
Another useful mode of visualization in the Logic Analyzer is the analog format.
filter_out signals in
You can also add dividers to the display. Click the Add Divider button in the toolbar.
Then specify a name for your divider on the DIVIDER tab. A divider is added underneath the selected wave. If no wave is selected, it is added at the bottom of the display. To move the divider, click on the divider name and drag it to a new position. Alternatively, use the Move arrows on the DIVIDER tab.
For more instructions on using the waveform display tool, see Logic Analyzer.
Discrete FIR Filter (DSP HDL Toolbox)