Multiply-Accumulate

R2026b

Perform a multiply-accumulate operation on the inputs

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Multiply-Accumulate block

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Libraries:
HDL Coder / HDL Operations

Description

The Multiply-Accumulate block computes the product of inputs a, b, and adds a bias value c to produce dataOut.

dataOut = sum(a.* b) + c

The block uses the Operation Mode parameter to control how it performs accumulation. With Operation Mode set to Vector, the block computes the dot product of values at the input ports a, b, then adds the bias value c. By default, the bias value c is 0. To use a nonzero bias value, set Bias to Dialog or Input port. The block performs multiplication in full precision regardless of the Output data type setting. The Output data type and Integer rounding mode settings apply to the addition operation. To generate HDL code for the block, use vector inputs. For scalar inputs, use the Multiply-Add block.

When Operation Mode is set to Streaming - using Start and End ports or Streaming - using Number of Samples, the block uses control signals to indicate when accumulation starts, when accumulation ends, and when the output is valid. Use Streaming - using Start and End ports when you want control signals to define the accumulation interval. Use Streaming - using Number of Samples when you want the block to accumulate a fixed number of valid samples.

Ports

Input

a — First multiplicand input

scalar | vector | matrix | array

First multiplicand input, specified as a scalar, vector, matrix, or array. This port provides one operand for the multiply-accumulate operations. The block multiplies the value at this port with the value at port b and accumulates the result according to Operation Mode. When Operation Mode is set to Vector, the block computes a dot product across the input elements. When Operation Mode is set to Streaming - using Start and End ports or Streaming - using Number of Samples, the block multiplies scalar input samples and accumulates the result over time.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | Boolean | fixed point

b — Second multiplicand input

scalar | vector | matrix | array | bus

Second multiplicand input, specified as a scalar, vector, matrix, or array. This port provides the second operand for the multiply-accumulate operation. The block multiplies the value at this port with the value at port a and accumulates the result according to Operation Mode. When Operation Mode is set to Vector, the block computes a dot product across the input elements. When Operation Mode is set to Streaming - using Start and End ports or Streaming - using Number of Samples, the block multiplies scalar input samples and accumulates the result over time.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | Boolean | fixed point

c — Bias or initial accumulator input

scalar

Bias or initial accumulator input, specified as a scalar. This port provides the bias value or initial accumulation value when Bias is set to Input port. When Operation Mode is set to Vector, the block adds this value to the dot product. When Operation Mode is set to Streaming - using Start and End ports or Streaming - using Number of Samples, the block uses this value as the initial accumulation value.

Dependencies

To enable this port, set Bias to Input port.

The data type is the same base type as the dataOut accumulator type.

startIn — Start of accumulation control signal

scalar

Start of accumulation control signal, specified as a scalar Boolean value. This port provides a control signal that indicates when accumulation starts. When Operation Mode is set to Streaming - using Start and End ports, the block uses startIn with validIn to begin accumulation. To start obtaining the accumulated output value from the dataOut signal, both validIn and startIn must be high. The dataOut signal produces the accumulated result from the next clock cycle.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End Ports.

Data Types: Boolean

validIn — Valid input control signal

scalar

Valid input control signal, specified as a scalar Boolean value. This port provides the control signal that indicates the input signal is valid for accumulation. When Operation Mode is set to Streaming - using Start and End Ports, the block begins producing the accumulated output value at dataOut only when both validIn and startIn are high. The dataOut signal produces the accumulated result from the next clock cycle. When Operation Mode is set to Streaming - using Number of Samples, the block accumulates only the input samples for which validIn is high. The validIn signal has higher priority than the startIn and endIn signals.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End ports or Streaming - using Number of Samples.

Data Types: Boolean

endIn — End of accumulation control signal

scalar

End of accumulation control signal, specified as a scalar Boolean value. This port provides the control signal that indicates the end of accumulation. You can use the startIn and endIn signals with the validIn signal to indicate a frame that contains the accumulated output.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End ports and then select Enable end input and output.

Data Types: Boolean

Output

dataOut — Accumulated output result

scalar

Accumulated output result, returned as a scalar. When Operation Mode is set to Vector, this port outputs the dot product of value at port a and b plus the bias value. When Operation Mode is set to Streaming - using Start and End Ports, this port outputs the accumulated result for the frame defined by the start and end control signals. When Operation Mode is set to Streaming - using Number of Samples, this port outputs the accumulated result for the specified number of valid samples.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | fixed point

startOut — Start of accumulation output control signal

scalar

Start of accumulation output control signal, returned as a scalar Boolean value. This port generates the output signal that indicates the start of accumulation. When both validIn and startIn become high, the startOut signal becomes high in the next clock cycle. The clock cycle at which startOut becomes high indicates the start of a frame and that the dataOut signal has started producing valid accumulated output.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End ports and then select Enable start output port.

Data Types: Boolean

validOut — Valid output control signal

scalar

Valid output signal, returned as a scalar Boolean value. This port generates the output control signal that indicates the dataOut signal is valid. When the validIn signal becomes high, the validOut signal becomes high in the next clock cycle and indicates that the dataOut is valid.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End ports or Streaming - using Number of Samples, and then select Enable valid output port.

Data Types: Boolean

endOut — End of accumulation output control signal

scalar

End of accumulation output signal, returned as a scalar Boolean value. This port generates the output control signal that indicates the end of accumulation. You can use the clock cycles between when the startOut signal becomes high and when the endOut signal becomes high to indicate a valid frame that contains the accumulated output.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End ports or Streaming - using Number of Samples and then select Enable end input and output ports.

Data Types: Boolean

countOut — Count output control signal

scalar

Count output control signal, returned as a scalar value.

This port generates output control signal to indicate the number of samples accumulated. The value of this signal increases from 1 to the value that you specify for Number of Samples. As long as the validIn signal is high, the countOut increments by 1 every clock cycle. The bit width of this port is ceil(log2(Number of Samples + 1)).

Dependencies

To enable this port, set Operation Mode to Streaming - using Number of Samples and then select Enable count output port.

Data Types: uint8 | uint16 | uint32 | fixed point

Parameters

Operation Mode — Mode of accumulation of inputs

Vector (default) | Streaming - using Start and End ports | Streaming - using Number of Samples

Specify how the block performs accumulation.

• When Operation Mode is set to Vector, the block performs the dot product of the values at the input ports a and b and adds the value at port c to produce the result.

• When Operation Mode is set to Streaming - using Start and End ports, the block accumulates scalar input samples over a frame defined by control signals.

• When Operation Mode is set to Streaming - using Number of Samples, the block accumulates a specified number of valid scalar input samples.

Programmatic Use

Block parameter: opMode

Type: character vector

Value: 'Vector' | 'Streaming - using Start and End ports' | 'Streaming - using Number of Samples'

Default: 'Vector'

Bias — Bias source selection

Dialog (default) | Input port

Specify how the block gets the bias or initial accumulator value.

• When Bias is set to Dialog, the block uses the value specified by Initial value

• When Bias is set to Input port, the block uses input port c.

Programmatic Use

Each operating mode uses a separate set of parameters for bias source and value:

Vector mode:

Block parameter (source): initValueSetting

Type: character vector

Value: 'Dialog' | 'Input port'

Default: 'Dialog'

Block parameter (value): initValue

Type: character vector

Value: A scalar number

Default: '0'

Streaming - using Start and End ports mode:

Block parameter (source): initValueSetting2

Block parameter (value): initValue2

Streaming - using Number of Samples mode:

Block parameter (source): initValueSetting3

Block parameter (value): initValue3

Number of Samples — Number of samples of valid accumulated output signal

{'2'} (default)

Specify the Number of Samples to define a frame containing the number of samples of valid accumulated output dataOut.

Dependencies

To enable this port, set Operation Mode to Streaming - using Number of Samples.

Programmatic Use

Block parameter: num_samples

Type: character vector

Value: A positive integer greater than zero

Default: '2'

Output data type — Data type of the block output

Inherit: Inherit via internal rule (default)

Set the output data type to:

• A rule that inherits a data type, such as Inherit: Same as first input.

• A built-in data type, such as single or int16.

• The name of a data type object. For instance, a Simulink.NumericType object.

• An expression that evaluates to a valid data type, for example, fixdt(1,16,0)

The streaming modes do not support Inherit: Inherit via internal rule. When you set the Output data type, you can use the Data Type Assistant. To display the assistant, click the Show data type assistant .

Programmatic Use

Block parameter: OutDataTypeStr

Type: character vector

Default: 'Inherit: Inherit via internal rule'

To see possible values that you can specify for this parameter, see Programmatically Specify Block Parameters and Properties.

Integer rounding mode — Rounding mode for fixed-point operations

Floor (default) | Ceiling | Convergent | Nearest | Round | Simplest | Zero

Specify the rounding mode that the block uses for fixed-point addition.

Ceiling

Rounds positive and negative numbers toward positive infinity. Equivalent to the MATLAB^® ceil function.

Convergent

Rounds number to the nearest representable value. If a tie occurs, rounds to the nearest even integer. Equivalent to the Fixed-Point Designer™ convergent function.

Floor

Rounds positive and negative numbers toward negative infinity. Equivalent to the MATLAB floor function.

Nearest

Rounds the number to the nearest representable value. If a tie occurs, rounds toward positive infinity. Equivalent to the Fixed-Point Designer nearest function.

Round

Rounds number to the nearest representable value. If a tie occurs, rounds positive numbers toward positive infinity and rounds negative numbers toward negative infinity. Equivalent to the Fixed-Point Designer round function.

Simplest

Chooses between rounding toward floor and rounding toward zero to generate rounding code that is as efficient as possible.

Zero

Rounds number toward zero. Equivalent to the MATLAB fix function.

Programmatic Use

Each operating mode uses a separate rounding mode parameter:

Block parameter (Vector mode): RndMeth

Block parameter (Streaming - using Start and End ports): RndMeth2

Block parameter (Streaming - using Number of Samples): RndMeth3

Type: character vector

Values: 'Floor' | 'Ceiling' | 'Convergent' | 'Nearest' | 'Round' | 'Simplest' | 'Zero'

Default: 'Floor'

To see possible values that you can specify for this parameter, see Programmatically Specify Block Parameters and Properties.

Saturate on integer overflow — Overflow handling setting

off (default) | on

Specify how the block handles fixed-point overflow during accumulation.

off (Wrap)

The block wraps the result on overflow. This mode is the most efficient for HDL code generation.

on (Saturate)

The block saturates the result on overflow. When the result overflows, the block sets the output to the closest representable value.

Dependencies

To enable this parameter, set Operation Mode to Vector.

Programmatic Use

Block parameter: DoSatur

Type: character vector

Values: 'off' | 'on'

Default: 'off'

Enable valid output port — Option to enable validOut output port

on (default) | off

Select this parameter to enable the validOut output port.

Dependencies

To enable this port, set Operation Mode to Streaming - using Number of Samples or Streaming - using Start and End ports.

Programmatic Use

Block parameter: validOut

Type: character vector

Values: 'off' | 'on'

Default: 'on'

Enable end input and output ports — Option to enable endIn input port and endOut output port

on (default) | off

Select this parameter to enable the endIn input port and the endOut output port.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End Ports.

Programmatic Use

Block parameter: endInandOut

Type: character vector

Values: 'off' | 'on'

Default: 'on'

Enable start output port — Option to enable startOut output port

on (default) | off

Select this parameter to enable the startOut output port.

Dependencies

To enable this port, set Operation Mode to Streaming - using Start and End Ports.

Programmatic Use

Block parameter: startOut

Type: character vector

Values: 'off' | 'on'

Default: 'on'

Enable count output port — Option to enable countOut output port

on (default) | off

Select this parameter to enable the countOut port.

Dependencies

To enable this port, set Operation Mode to Streaming - using Number of Samples.

Programmatic Use

Block parameter: countOut

Type: character vector

Values: 'off' | 'on'

Default: 'on'

Tips

With the Multiply-Accumulate block, you can:

• Perform matrix multiplication operations. For example, if you have two matrix inputs with dimensions N-by-M and M-by-P, you can compute the result by using N-by-P multiply-accumulate operations in parallel.

• Replace a sequence of multiplication and addition operations, such as in filter blocks, and improve the performance on hardware by mapping to DSP slices on the FPGA. This figure shows how you can use the Multiply-Accumulate block with the sfir_fixed model.

  

Algorithms

Streaming Mode Using Start and End Ports

You can use the Operation Mode setting for the block to specify a streaming mode of operation. When you select Streaming - using Start and End Ports, you see three additional settings enabled by default. The settings include:

• Enable valid output port

• Enable end input and output ports

• Enable start output port

Leave these settings enabled. When you apply the settings, three additional input ports and three additional output ports appear:

Input Ports	Output Ports
startIn	startOut
validIn	validOut
endIn	endOut

This figure illustrates the streaming mode of operation using the start and end ports. In this example, the bias value is 8.

Initially, when validIn is low, dataOut is zero. At time 1s, both startIn and validIn become high. Therefore, validOut becomes high in the next clock cycle and dataOut starts producing valid accumulation output. During accumulation, dataOut takes the values of a and b from the previous clock cycle. For example, at time t = 2s, dataOut = 1*1 + 8 = 9.

To continue accumulation, make startIn low at the next clock cycle and keep validIn high. dataOut continues accumulating the inputs until validIn becomes low. At each time step, dataOut computes the product of the inputs from the previous clock cycle and sums the result with the dataOut value from the previous clock cycle. For example, at time t = 3s, dataOut = 2*2 + 9 = 13.

When validIn becomes low, dataOut holds the output value as seen at time t = 5s. At t = 5s, endIn and validIn are high. Therefore, endOut becomes high in the next clock cycle, which indicates end of frame. Therefore the frame between t = 2s (when startOut is high) and t = 6s (when endOut is high) indicates a frame containing valid output.

If startIn, validIn, and endIn are all high at the same time, only the dataOut corresponding to those inputs are accumulated as seen at t = 8s. If startIn is high for multiple clock cycles, and if validIn is high, the accumulator is reset at each clock cycle as seen at t = 10s and t = 11s. The accumulation continues at t = 12s.

Streaming Mode Using Number of Samples

You can use the Operation Mode setting for the block to specify a streaming mode of operation. When you select Streaming - using Number of Samples, you see two additional settings enabled by default. The settings include:

• Enable valid output port

• Enable count output port

Leave these settings enabled. When you apply the settings, you have an additional input port validIn and three additional output ports appear:

• endOut

• validOut

• countOut

This figure illustrates the streaming mode of operation using the number of samples. In this example, the bias value is 8 and the Number of Samples is 5.

Initially, when validIn is low, dataOut is 0 and countOut is 1. At time 1s, validIn becomes high. Therefore, validOut becomes high in the next clock cycle, and dataOut starts producing valid accumulation output. During accumulation, dataOut takes the values of a and b from the previous clock cycle. For example, at time t = 2s, dataOut = 1*1 = 1. countOut increments by 1 at the next clock cycle, that is, at t = 3s, countOut becomes 2.

To continue accumulation, keep validIn high. dataOut continues accumulating the inputs until validIn becomes low. When five valid outputs are obtained from dataOut, countOut becomes 5 and endOut becomes high, which indicates the end of the frame. Therefore, the time between when countOut is 1 and when countOut is 5 indicates a frame containing valid output.

The accumulator counter is now reset and countOut starts from 1. When validIn becomes high again, dataOut starts accumulating a new set of values and countOut starts incrementing for each valid dataOut.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation

Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

HDL Architecture

HDL Architecture Setting	Description
Parallel	For input vectors of size N, this mode uses N Multiply-Add blocks in series to compute the result. This mode uses a combinatorial implementation and does not introduce any latency. If you specify the Synthesis tool and Target frequency, since the adaptive pipelining optimization is enabled, the code generator inserts pipeline registers for the Multiply-Add blocks. When you synthesize your design, depending on the input bit widths, this architecture maps up to N DSP slices on the FPGA.
Serial(Default)	For input vectors of size N, this mode uses a streaming algorithm to implement the multiply-accumulate operation. This architecture has two implementation modes: The default mode uses a local multirate implementation. This implementation overclocks the shared resources by N and multiplexes the input vectors with a Multiply-Add block. This implementation introduces an additional latency of one at the data rate. If you have clock-rate pipelining enabled on the model or subsystem that contains the Multiply-Accumulate block, this architecture uses a single-rate implementation. This implementation runs the shared resources at the clock-rate and multiplexes the input vectors with a Multiply-Add block. This implementation introduces an additional latency of N at the clock rate. When you synthesize your design, depending on the input bit widths, this architecture maps to one DSP slice on the FPGA.

HDL Block Properties

General
ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays in the design. Distributed pipelining does not redistribute these registers. The default value is 0. For more details, see ConstrainedOutputPipeline.
InputPipeline	Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default value is 0. For more details, see InputPipeline.
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default value is 0. For more details, see OutputPipeline.
SynthesisAttributes	Specifies the synthesis attributes for the blocks and block output signals in the model. The generated HDL code contains these attributes. For more information, see SynthesisAttributes.

Complex Data Support

When you use complex signals, this block can generate HDL code, but does not map to DSP slices.

Reset Type Recommendation

For the mapping of the Multiply-Accumulate block to DSP slices, use these reset type settings:

• For AMD^® FPGA boards, set Reset type to Synchronous.

• For Altera^® FPGA boards, set Reset type to Asynchronous.

To set the reset type, select HDL Code Generation > Global settings > Clock settings > Reset type.

Limitations

• Matrix data types are not supported at the block port interfaces for HDL code generation. If you have matrix type signals, use the Product, Matrix Multiply block in matrix multiplication mode.

• Streaming modes of operation for the block are not supported inside a Resettable Subsystem block for HDL code generation.

• The block does not support floating-point data types for HDL code generation.

• Inputs a and b must have the same dimensions. In Vector mode, inputs must not both be scalar.

• For fixed-point inputs, ports a and b must have matching signedness, word length, and fraction length.

• In streaming modes, all input ports must operate at the same sample rate.

• The Number of Samples parameter must be a positive integer greater than zero.

Version History

Introduced in R2017b

R2026a: Specify synthesis attributes for blocks and block output signals

Use the SynthesisAttributes HDL block property to specify the synthesis attributes for the block and its output signals. HDL Coder includes these attributes in the generated HDL code.