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Display Bus Information

When you use buses in your model, you can display bus information using multiple approaches.

For example:

  • To identify buses in your block diagram, use their compiled line styles.

  • To view bus hierarchy, use the Signal Hierarchy Viewer.

  • To trace bus elements to their source and destination blocks, use the Signal Hierarchy Viewer.

  • To view and trace buses at component interfaces, use the interface view.

  • To view simulation data for buses, use port value labels to display bus element values in the block diagram or use the Simulation Data Inspector.

  • To get bus information programmatically, use the get_param function.

Display Bus Line Styles

You can use line styles to visually identify buses after model compilation.

Line TypeLine Style
Virtual busVirtual bus line style
Nonvirtual busNonvirtual bus line style
Array of busesArray of buses line style

To compile a model, in the Simulink® Toolstrip, on the Modeling tab, click Update Model or Run.

View Bus Hierarchy

To display bus hierarchy:

  1. Select a bus in your model.

  2. In the Simulink Toolstrip, on the Signal tab, click Signal Hierarchy.

    A Signal Hierarchy Viewer opens, showing the signal hierarchy for the selected bus.

For example, this Signal Hierarchy Viewer shows the signal hierarchy for a bus named main_bus.

The Signal Hierarchy Viewer shows the hierarchy for a bus with two nested buses that contain two and three elements, respectively.

The Signal Hierarchy Viewer displays the hierarchy for the currently selected bus. If you select a different bus, the Signal Hierarchy Viewer updates to show the selected bus. If you edit a bus, the Signal Hierarchy Viewer reflects those updates.

For more information and an example, see Signal Hierarchy Viewer.

Trace Bus Element to Source and Destination Blocks

To trace a bus element to its source or destination blocks using the Signal Hierarchy Viewer:

  1. Select a bus in your model.

  2. In the Simulink Toolstrip, on the Signal tab, click Signal Hierarchy.

    The Signal Hierarchy Viewer opens, showing the signal hierarchy for the selected bus.

  3. In the Signal Hierarchy Viewer, select the element name.

  4. In the Signal Hierarchy Viewer, click Source or Destination to highlight source blocks or destination blocks, respectively.

For example, this block diagram view highlights the path to all source blocks for a bus element named Chirp from a bus named main_bus.

View that highlights all elements between the first source block for the bus element named Chirp and the bus named main_bus

To trace a signal with the Signal Hierarchy Viewer, you must have at least one signal line selected.

For more information and examples, see Signal Hierarchy Viewer.

Find Buses at Block Diagram Interfaces

To find buses at the input and output of a block diagram, use the interface view. On the Modeling tab, under Design, click Model Interface.

An input or output that has three bars next to it is a bus.

Interface display for sldemo_mdlref_counter_bus model

As a block diagram grows in size, the interface view allows you to more easily identify the block diagram inputs and outputs. The interface view also lets you trace signals through the nested levels.

For more information, see Trace Connections Using Interface Display.

Display Bus Element Values

To display the values of bus elements in the block diagram, use port value labels.

  1. Select a bus in your model.

  2. On the Signal tab, select Output Value Label.

  3. Click the port value label. Then, select the bus elements for which you want to display values.

For example, in the example model named busdemo, suppose you select all nonconstant signals in the bus named main_bus.

When you simulate the model, the port value label shows the names and values of the signals you selected.

For more information, see View Signal Values Using Port Value Labels.

View Simulation Data for Buses

When you view simulation data for buses, you plot the data for leaf elements of the buses.

Open the example. Then, open and simulate the model named ex_modeling_composite_signals.

This model logs data for the buses named goal and x_sensor.

To view the data logged in the simulation, in the Simulink Toolstrip, on the Simulation tab, click Data Inspector.

By default, the Simulation Data Inspector groups signals by data hierarchy. For buses, the data hierarchy is the bus hierarchy. Grouping bus data based on the bus hierarchy allows you to collapse the contents of a parent bus that contains many elements. You can plot the data for leaf elements in the buses.

For more information and visualization options, see Decide How to Visualize Simulation Data.

Get Bus Hierarchy and Virtuality Programmatically

To programmatically get the hierarchy and virtuality of a bus in a compiled model, query these parameters using the get_param function:

  • 'SignalHierarchy' — If the signal is a bus, returns the name and hierarchy of the signals in the bus.

  • 'CompiledBusType' — For a model that has run the 'compile' phase, returns information about whether the signal connected to a port is a bus and whether the signal is a virtual or nonvirtual bus. Before you query the CompiledBusType parameter value, use the model name programmatic interface to compile the model. For more information, see Use Model Name as Programmatic Interface.

Open the example. Then, open and compile the model named busdemo. Compiling the model updates the line styles, which you can use to visually identify buses.

model = 'busdemo';
open_system(model);
set_param(model,'SimulationCommand','Update');

Obtain the handle of the port for which you want bus information.

ph = get_param('busdemo/Bus Creator','PortHandles');

Get the signal hierarchy at the port.

sh = get_param(ph.Outport,'SignalHierarchy')
sh = struct with fields:
    SignalName: 'main_bus'
     BusObject: ''
      Children: [2x1 struct]

Get the compiled bus type at the port.

busdemo([],[],[],'compile');
bt = get_param(ph.Outport,'CompiledBusType')
bt = 
'VIRTUAL_BUS'

Terminate the simulation that was started by compiling the model.

busdemo([],[],[],'term');

Get Bus Attributes at Interfaces Programmatically

To get the attributes of a bus at a bus element port programmatically, use the get_param function.

Open the example. Then, open and compile the model named SpecifiedBusInterface. Compiling the model updates the line styles, which you can use to visually identify buses.

model = "SpecifiedBusInterface";
open_system(model);
set_param(model,SimulationCommand="Update");

SpecifiedBusInterface model

The model creates a bus named TopBus that contains a bus named NestedBus and a signal named Step. The nested bus contains signals named Chirp and Sine. The top-level bus connects to the input port of a subsystem. At the output port of the subsystem, the output bus connects to an Out Bus Element block.

Get the data type of the output bus at the root level of the model.

elem0 = "SpecifiedBusInterface/OutBus";
get_param(elem0,"OutDataTypeStr")
ans = 
'Inherit: auto'

Open the subsystem, which contains In Bus Element and Out Bus Element blocks.

An In Bus Element block labeled InBus.NestedBus.Chirp connects to an Out Bus Element block labeled OutBus.Chirp. An In Bus Element block labeled InBus.Step connects to an Out Bus Element block labeled OutBus.Step.

Get the minimum and maximum values of the input and output elements named Chirp. The input element named Chirp is in a nested bus in the top-level bus.

elem1 = "SpecifiedBusInterface/Subsystem/InBus.NestedBus.Chirp";
get_param(elem1,'Minimum')
ans = 
'-1'
get_param(elem1,'Maximum')
ans = 
'1'

The output element named Chirp is in the top-level bus. The output bus has no nested buses.

elem2 = "SpecifiedBusInterface/Subsystem/OutBus.Chirp";
get_param(elem2,"Minimum")
ans = 
'-1'
get_param(elem2,"Maximum")
ans = 
'1'

For more information about bus attributes at bus element ports, see In Bus Element and Out Bus Element.

See Also

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