How to get variable frequency sinewave that can be converted to verilog using HDLCODER

Hello,

I would like to build a variable frequency sinewave that can be converted to verilog using HDLCODER. Frequency variations needed in steps of 1,5,10,15,20,25,30,35,40,45 & 50Hz (10 to 11) steps. Waiting for the response.

Thanking you in advance.

Regards,

Roy

Answer 1

[Tim McBrayer]

How would you build a single-frequency sine wave generator? How would two single-frequency sine wave generators operating at different frequencies look alike? How would they be different? Once you have a solid grasp of the answers to these questions the solution should present itself.

[Roy Francis]

Hello Sir, I am using table look up table method to generate the sine wave. The sine block used is the DSP sine wave. If I use multiple sine block in my model, while converting it to HDL, it may take huge memory space. One sine LUT consumes around 30,000 code lines while generating the RTL code. Hence I am looking for any short cut to get multiple sine from single sine look up table(say 50Hz sine look-up table to 40Hz,30Hz,20Hz,10Hz sine generation). Thanking you in advance!! Regards,

[Tim McBrayer]

These are all sine waves; they have the identical shape. The only difference is what the step size is between your samples. If you have 100 table entries for a table containing one full cycle, then for a 10Hz wave (with a period of 0.1 sec), the time step between samples is 0.001 sec. If you take the same table, and now interpret it as a 20Hz sine wave (period == 0.05 sec), the time step between table samples is 0.0005 sec. The only thing that changes is your time scale; the table data is the same for all sine waves.

Also, keep in mind that all 4 quadrants of the sine wave are identical; with a minimal amount of work you only need to create a 1/4 wave table.