How to run "Use FPGA I/O to Communicate with FPGA" example in a repetitive For-Loop?

Hi,

For the example “Use FPGA I/O to Communicate with FPGA”, I followed all the documented steps exactly. I was able to generate the bitstream for the ZCU102 with FMCOM2/3 and successfully program the board using the generated bitstream.

Next, I copied the MATLAB code from the example page and ran it to transmit and receive a chirp signal using RF loopback. I can observe both the TX and RX power correctly. When I run the code a single time, it works as expected and I obtain the correct input and output signals.

However, I need to run this example inside a for-loop to transmit and receive data multiple times. I understand that on the rising edge of the "txStart" signal, TVALID pulses are generated on both the TX and RX sides. In the for-loop, the start signal is toggled by writing 1 and then 0, and the stream write and stream read operations are also executed.

I have tried different combinations of toggling the start signal and performing the stream read/write operations, but the behavior is not correct. Specifically, only one out of every three iterations receives the data correctly. you can find attached one of the multiple codes that I tried.

Could you please provide a MATLAB .m script that works correctly with this example when executed inside a for-loop? Are you able to send and receive data properly multiple times?

Thanks.

Answer 1

[User_Hos]

After further investigation, I identified the root cause.

The TVALID signal generated for the RX data does not produce a pulse with the correct length. Instead, the generated TVALID duration is approximately 1.5× the TX data length, which causes the Streaming DMA to operate incorrectly.