HDL Coder Error while converting AWGN function code to Fixed-Point code. Any suggestion to solve it?

I am using HDL Coder to convert AWGN function to Fixed-Point code as part of VHDL code conversion. but it produces an rrror while converting AWGN function code to Fixed-Point code. Any suggestion to solve it?

Can anyone help me how can I fix and solve the error? It very important.

Thank you for your help. Best Regards, Ghazanfar Latif

[Walter Roberson]

What error message is produced?

[Ghazanfar Latif]

Thanks for reply. Here is the error message:

"The function 'awgn' is not supported for standalone code generation. See the documentation for coder.extrinsic to learn how you can use this function in simulation."

I want to test the code in Xilinx. So can I still use the "coder.extrinsic" ? Can you please guide or give a hint to resolve this? Thank you so much for your kind help

[Walter Roberson]

coder.extrinsic cannot be used for code that is to be deployed.

[Ghazanfar Latif]

Thanks for the answer.

So any possible way to solve this function issue? A small hint from your side might help to get the solution. Thanks

Answer 1

[Walter Roberson]

HDL Coder does not support any of the random number generators.

Fortunately I researched this earlier this year and found some suggestions on how to implement random numbers in HDL:

https://www.mathworks.com/matlabcentral/answers/286857-non-supported-functions-in-hdl-coder#answer_224174

[Walter Roberson]

See http://www.gaussianwaves.com/2015/06/how-to-generate-awgn-noise-in-matlaboctave-without-using-in-built-awgn-function/ for a code outline.

The difficult part there is that randn() is not implemented for HDL. The Answer I link to above contains references to two HDL implementations of random number routines, which you could use to generate the normally distributed random numbers.

You might also want to see http://hforsten.com/generating-normally-distributed-pseudorandom-numbers-on-a-fpga.html or http://www.alteraforum.com/forum/archive/index.php/t-22532.html or http://kanyevsky.kpi.ua/fpgadesign/dsp_rab1e.html