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problem with hdl work flow advisor

1 vue (au cours des 30 derniers jours)
shide agani
shide agani le 8 Avr 2013
HI.i have recently generate hdl code using hdl cosimulation block in simulink and i execute a s/r flip flop program by linking matlab and modelsim and now i am using hdl work flow advisor to run it with fpga,i choose hdl cosimulation block for subsystem ,when i run the taskes i got these errors would you please help me?thank for your kind
ERROR:HDLParsers:1202 - "C:/MY PLAY AREA/hdl_prj/hdlsrc/Subsystem.vhd" Line 65. Redeclaration of symbol q. ERROR:HDLParsers:3281 - "C:/MY PLAY AREA/hdl_prj/hdlsrc/Subsystem.vhd" Line 70. rtl is not an architecture body for HDL_Cosimulation in library work. ERROR:HDLParsers:843 - "C:/MY PLAY AREA/hdl_prj/hdlsrc/Subsystem.vhd" Line 84. Formal q of

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