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Question
HDLCoder timing closure errors on hps2fpga brigde when scaling up a model.
Im trying to scale up a motor control algorithm from 1 controller to 4 instances on HDLCoder in 2018b. The Plattform is a Cyclon...
plus de 4 ans il y a | 2 réponses | 0
2
réponsesQuestion
Implementation Latency of Blackbox Subsystem when using oversampling
I have a Data Aquisition Module written in VHDL and inserted into Simulink via a DocBlock Blackbox Subsystem.(Matlab 2018a) The...
plus de 5 ans il y a | 3 réponses | 0
3
réponsesQuestion
Exclude Signal from Delay Balancing
I have a DocBlock based Blackbox implementation for IO Communication in a HDL Coder Simulink Project. It requires direct GPIO C...
presque 6 ans il y a | 1 réponse | 0
1
réponseQuestion
Required Linux image / utilitys for IntelSoC custom boards
Im trying to get the HDL Coder/Embedded Coder Co-Demo "hdlcoder_led_blinking" working with a custom board: DE0-nano-SoC/Atlas So...
environ 6 ans il y a | 1 réponse | 0
