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Dominique Görner


Last seen: 7 mois il y a |  Actif depuis 2020

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HDLCoder timing closure errors on hps2fpga brigde when scaling up a model.
Im trying to scale up a motor control algorithm from 1 controller to 4 instances on HDLCoder in 2018b. The Plattform is a Cyclon...

plus de 3 ans il y a | 2 réponses | 0

2

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Question


Implementation Latency of Blackbox Subsystem when using oversampling
I have a Data Aquisition Module written in VHDL and inserted into Simulink via a DocBlock Blackbox Subsystem.(Matlab 2018a) The...

plus de 4 ans il y a | 3 réponses | 0

3

réponses

Question


Exclude Signal from Delay Balancing
I have a DocBlock based Blackbox implementation for IO Communication in a HDL Coder Simulink Project. It requires direct GPIO C...

plus de 4 ans il y a | 1 réponse | 0

1

réponse

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Required Linux image / utilitys for IntelSoC custom boards
Im trying to get the HDL Coder/Embedded Coder Co-Demo "hdlcoder_led_blinking" working with a custom board: DE0-nano-SoC/Atlas So...

presque 5 ans il y a | 1 réponse | 0

1

réponse