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How to add wave to logic analyzer
Which version of MATLAB are you using? Are you using the Simulink Logic Analyzer or dsp.LogicAnalyzer? What is the data type o...

presque 9 ans il y a | 0

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HDL Code: How to feed an FFT a [64x1] vector as an input.
You do not need to buffer 64 samples and then pass it all at once to the HFL FFT. You can just pass in one sample at a time as y...

presque 9 ans il y a | 0

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LogicAnalyser - Variable Number of inputs
Please take a look at the file analyzeLogicFromSimulink to see how to pass in the entire set of data at one go. This function cr...

presque 9 ans il y a | 0

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How to manually convert MATLAB code into Verilog code?
Please take a look at the examples provided with HDL Coder - you can do HDL conversion from Simulink or MATLAB designs. Typical ...

environ 9 ans il y a | 1

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How to set simulation time, sampling time, and model parameters in Simulink when using FPGA-in-the-loop
Can you try just making the FPGA part a pass through to make sure that the FIl simulation is working? You may want to aslo look ...

environ 9 ans il y a | 0

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How can we set the time for deired sample time in HDL Coder (Simulink) ?
The sample time is set so that the pixel sample time is 1. For the 240p stream, the total number of pixels per line is 402 and t...

environ 9 ans il y a | 1

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Invalid Trellis Structure: Each element of the 'outputs' matrix (in decimal format) must be between 0 and numOutputSymbols-1.
Which version of MATLAB are you using? I was able to generate HDL code for the Convolutional encoder and Viterbi decoder subsys...

environ 9 ans il y a | 1

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frame_to_pixel and pixel_to_frame blocks blocks
Please take a look at the example in Vision HDL Toolbox to see how you can import images or videos using Frame To Pixels and Pix...

plus de 9 ans il y a | 0

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frame to pixel stream block
Please take a look at the examples in vision HDL Toolbox. For example, the <https://www.mathworks.com/help/visionhdl/examples/ed...

plus de 9 ans il y a | 1

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About image processing on fpga
Just wanted to confirm that you are trying to find Vision HDL Toolbox and not Computer Vision System Toolbox. Just use the re...

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About image processing on fpga
You can use the Edge Detection block in Vision HDL Toolbox - that block generates HDL code.

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sort() in HDL Coder
If you have the Vision HDL Toolbox, it has a Histogram block that is optimized for HDL.

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The most interesting head scratching "break" command problem in Simulink these days
In this case, since you are passing in the 80x1 matrix, here's what you do: % returns last index that matches gs >= g fo...

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Simulink "Find block" HDL Coder
I believe this is answered with the other question you posed on the break command. See how idx is a persistent value - that mea...

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The most interesting head scratching "break" command problem in Simulink these days
For HDL, having a variable sized for loop is problematic. What you want to do is to loop over all the indices, but only store th...

plus de 9 ans il y a | 0

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Simulink "Find block" HDL Coder
Assuming that gs and g are two vectors that are streaming in, you can compare each value of gs to g with the relational operator...

plus de 9 ans il y a | 0

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sort() in HDL Coder
There is no support for sort, but it may be useful to know why you would like to implement sort. Is it for a median filter, whic...

plus de 9 ans il y a | 0

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FFT HDL Optimized block output is different from FFT block output
To connect the fft to the ifft, you also need to connect the valid out port of the fft to the valid in port of the ifft. Likewis...

plus de 9 ans il y a | 2

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histogram code from Matlab
If you have access to Vision HDL Toolbox and HDL Coder, you can generate HDL code for the Histogram block or System object shipp...

plus de 9 ans il y a | 0

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Why do i get an error in the Fixed Point Conversion Step?
Pablo, splitting the function into a main function and calling the IFFT function from it resulted in HDL code generation. Here a...

plus de 9 ans il y a | 0

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makehdl('ImageSharpeningHDLModel/Image Sharpening HDL System') fpga implementation problem
You can feed in the single control bus into a Pixel Control Bus Selector block which will then send out 5 signals (hStart hEnd v...

plus de 9 ans il y a | 0

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HI,SIR/MAM i write matlab code for adaptive gamma correction for contrast enhancement i want to convert the code in to VERILOG HDL can anybody give me the suggestion
You can try using the Gamma Correction System object or block in Vision HDL Toolbox. There is an <http://www.mathworks.com/help/...

plus de 9 ans il y a | 1

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I have a 415x7 matrix of floating point values in text file. I need to convert these values into fixed point numbers so that I can use this matrix as input in verilog. Can someone please tell how can I do it?
You can use the fi function to convert the floating point values to fixed point. fi also lets you get the hex or bin equivalent ...

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Hi sir i am working on hdl coder and i am stuck with error like "FOUND UNSUPPORTED DIVISION EXPRESSION FOR HDL CODE GENERATION SIGNED INPUT DATA TYPE IS NOT SUPPORTED FOR DIVISION WITH FLOOR MODE",i
For atan2, you can use the Complex To magnitude Angle block or System object which uses CORDIC underneath. Here is a link to the...

presque 10 ans il y a | 0

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Unable to convert Simulink model to vhdl using hdl workflow
Please try using fdatool to generate a filter block instead of using the fdatool LPF block. HDL support is provided for Discrete...

presque 10 ans il y a | 1

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how to generate hdl code for edge detection block in simulink
The Vision HDL Toolbox has an Edge Detection block that is suitable for HDL code generation. That block takes in serial input, m...

environ 10 ans il y a | 1

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HDL OFDM MODEL.
There is an example shown with HDL Coder that shows the OFDM Demodulator in the context of an LTE system. Type doc hdlcoder and...

environ 10 ans il y a | 0

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SIMULINK -HDL CONVERSION ERROR
Vision HDL Toolbox was released in R2015a. You may need to ask your administrator to see if you have access to this Toolbox.

environ 10 ans il y a | 0

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makehdl error: "There is no block named "
Please try the following command: makehdl([model_name '/' block_name]). It will be best if we can see the model (if you can post...

environ 10 ans il y a | 0

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Practicality of HDL Coder for complex designs.
If you use blocks like the HDL Optimized FFT, the control signals are part of the block and can be used to drive the functionali...

environ 10 ans il y a | 0

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