Saturation Dynamic
Limit input signal to dynamic upper and lower saturation values
Libraries:
Simulink /
Discontinuities
HDL Coder /
Discontinuities
Description
The Saturation Dynamic block produces an output signal that is the value of the input signal
bounded to the saturation values from the input ports up
and
lo
.
Input | Output |
---|---|
lo ≤ Input value ≤ up | Input value |
Input value < lo | Lower limit |
Input value > up | Upper limit |
Ports
Input
u — Input signal
scalar | vector
The input signal to the saturation algorithm.
Data Types: double
| single
| int8
| int16
| int32
| int64
| uint8
| uint16
| uint32
| uint64
| fixed point
up — Signal that provides the upper saturation limit
scalar | vector
Dynamic value providing the upper saturation limit. When the input is greater than up then the output value is bound to up.
Data Types: double
| single
| int8
| int16
| int32
| int64
| uint8
| uint16
| uint32
| uint64
| fixed point
lo — Signal that provides the lower saturation limit
scalar | vector
Dynamic value providing the lower saturation limit. When the input is less than lo then the output value is bound to lo.
Data Types: double
| single
| int8
| int16
| int32
| int64
| uint8
| uint16
| uint32
| uint64
| fixed point
Output
y — Output signal
scalar | vector
Output signal that is the value of the input signal, upper saturation limit, or lower saturation limit.
Data Types: double
| single
| int8
| int16
| int32
| int64
| uint8
| uint16
| uint32
| uint64
| fixed point
Parameters
To edit the parameters for the Saturation Dynamic block, double-click the block icon.
The Data Type Assistant helps you set data
attributes. To use the Data Type Assistant, click Show data type
assistant
. For more information, see Specify Data Types Using Data Type Assistant.
Output minimum — Minimum output value for range checking
[]
(default) | scalar
Lower value of the output range that Simulink® checks.
Simulink uses the minimum to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixed-point data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output minimum does not saturate or clip the actual output signal. Use the Saturation block instead.
Programmatic Use
Block Parameter:
OutMin |
Type: character vector |
Values: '[ ]' |
scalar |
Default: '[ ]' |
Output maximum — Maximum output value for range checking
[]
(default) | scalar
Upper value of the output range that Simulink checks.
Simulink uses the maximum value to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixed-point data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output maximum does not saturate or clip the actual output signal. Use the Saturation block instead.
Programmatic Use
Block Parameter:
OutMax |
Type: character vector |
Values: '[ ]' |
scalar |
Default: '[ ]' |
Output data type — Specify the output data type
Inherit: Same as input
(default) | Inherit: Inherit via back propagation
| double
| single
| int8
| int32
| uint32
| int64
| uint64
| fixdt(1,16,2^0,0)
| <data type expression>
| ...
Choose the data type for the output. The type can be inherited, specified directly, or
expressed as a data type object such as Simulink.NumericType
. For
more information, see Control Data Types of Signals.
Programmatic Use
Block Parameter:
OutDataTypeStr |
Type: character vector |
Values: 'Inherit: Same as
input' , 'Inherit: Inherit via back
propagation' , 'single' , 'int8' ,
'uint8' , int16 ,
'uint16' , 'int32' ,
'uint32' , 'int64' ,
'uint64' , fixdt(1,16,0) ,
fixdt(1,16,2^0,0) ,
fixdt(1,16,2^0,0) . '<data type
expression>' |
Default: 'Inherit: Same as
input' |
Lock output data type setting against changes by the fixed-point tools — Prevent fixed-point tools from overriding Output data type
off
(default) | on
Select this parameter to prevent the fixed-point tools from overriding the Output data type you specify on the block. For more information, see Use Lock Output Data Type Setting (Fixed-Point Designer).
Programmatic Use
Block Parameter:
LockScale |
Type: character vector |
Values:
'off' | 'on' |
Default:
'off' |
Integer rounding mode — Specify the rounding mode for fixed-point operations
Floor
(default) | Ceiling
| Convergent
| Nearest
| Round
| Simplest
| Zero
Choose one of these rounding modes.
Ceiling
Rounds both positive and negative numbers toward positive infinity. Equivalent to the MATLAB®
ceil
function.Convergent
Rounds number to the nearest representable value. If a tie occurs, rounds to the nearest even integer. Equivalent to the Fixed-Point Designer™
convergent
function.Floor
Rounds both positive and negative numbers toward negative infinity. Equivalent to the MATLAB
floor
function.Nearest
Rounds number to the nearest representable value. If a tie occurs, rounds toward positive infinity. Equivalent to the Fixed-Point Designer
nearest
function.Round
Rounds number to the nearest representable value. If a tie occurs, rounds positive numbers toward positive infinity and rounds negative numbers toward negative infinity. Equivalent to the Fixed-Point Designer
round
function.Simplest
Automatically chooses between round toward floor and round toward zero to generate rounding code that is as efficient as possible.
Zero
Rounds number toward zero. Equivalent to the MATLAB
fix
function.
Programmatic Use
Block Parameter:
RndMeth |
Type: character vector |
Values:
'Ceiling' |
'Convergent' |
'Floor' |
'Nearest' |
'Round' |
'Simplest' |
'Zero' |
Default:
'Floor' |
See Also
For more information, see Rounding (Fixed-Point Designer).
Saturate on integer overflow — Choose the behavior when integer overflow occurs
off
(default) | on
Action | Reasons for Taking This Action | What Happens for Overflows | Example |
---|---|---|---|
Select this check box. |
Your model has possible overflow, and you want explicit saturation protection in the generated code. |
Overflows saturate to either the minimum or maximum value that the data type can represent. |
The maximum value that the |
Do not select this check box. |
You want to optimize efficiency of your generated code. You want to avoid overspecifying how a block handles out-of-range signals. For more information, see Troubleshoot Signal Range Errors. |
Overflows wrap to the appropriate value that is representable by the data type. |
The maximum value that the |
When you select this check box, saturation applies to every internal operation on the block, not just the output or result. Usually, the code generation process can detect when overflow is not possible. In this case, the code generator does not produce saturation code.
Programmatic Use
Block Parameter:
DoSatur |
Type: character vector |
Value: 'off' |
'on' |
Default: 'off' |
Block Characteristics
Extended Capabilities
C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.
HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
This block has one default HDL architecture.
ConstrainedOutputPipeline | Number of registers to place at
the outputs by moving existing delays within your design. Distributed
pipelining does not redistribute these registers. The default is
|
InputPipeline | Number of input pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is
|
OutputPipeline | Number of output pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is
|
PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.
Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.
Version History
Introduced before R2006a
See Also
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