Info
Cette question est clôturée. Rouvrir pour modifier ou répondre.
How to reprogram the FPGA using the previously generated bitstream
1 vue (au cours des 30 derniers jours)
Afficher commentaires plus anciens
I am using HDL Workflow Advisor to program the FPGA on the ZedBoard.
The problem is, when I close the Workflow Advisor window, I have to re-synthesize the design, even if I do not change it. Is there a way to reprogram the FPGA using the previously generated bitstream without going through the Workflow Advisor again?
1 commentaire
Long Wang
le 17 Nov 2017
Actually this would also be my question :-) Additionally I would like to know, how to use JTAG to download the bitstream to Zedboard. Hopefully after two years, there will be an answer.
Réponses (0)
Cette question est clôturée.
Voir également
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!