- Overview of FPGA-in-the-Loop (FIL) : https://www.mathworks.com/help/hdlcoder/fpga-in-the-loop-1.html
- HDL Coder Support Package for Xilinx FPGA Boards : https://www.mathworks.com/matlabcentral/fileexchange/43087-hdl-coder-support-package-for-xilinx-fpga-boards
- Example: capturing ADC samples from AD9467-FMC on KC705 (A community reference for interfacing an ADC board with KC705) : https://ez.analog.com/fpga/f/q-a/31713/accessing-adc-sample-data-from-ad9467-fmc-using-kc705/303080
Receiving ADC Input on the KC705 Board Using System Generator (Xilinx Toolbox)
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I am currently performing HIL (FIL) on a custom IP core using the KC705 board.
So far, I have been feeding data into the Gateway In block by using Simulink’s Sine block, and verifying the output signals via Gateway Out.
My question is whether it is possible to route data from an external function generator—received by the KC705’s ADC—into the Gateway In block.
If you know of any related examples or methods, I would greatly appreciate your guidance.
I have already reviewed examples using Vivado IP, but I would like to carry out this process entirely within Simulink (so that I can change settings in real time).
Thank you in advance for any information you can share.
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Amish
le 11 Août 2025 à 10:38
Hi Ohrum,
Yes, you can route data from an external function generator (via the KC705’s ADC) into a Gateway In block in Simulink, as long as the ADC interface is included in the FIL build.
The KC705 itself doesn’t have a built-in ADC, so you’d typically connect an FMC ADC card.
In Simulink, you can use the HDL Coder board support package for KC705, drop in the ADC interface block from the BSP library, and connect it to your processing logic and Gateway blocks. When you run FIL, the FPGA bitstream will include the ADC capture logic, and you can tweak settings in real time.
Some of the resoueces you can check out :
Hope this helps!
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