HDL OFDM Transmitter (whdl/WHDL​OFDMTransm​itterExamp​le) Issue

I am using the MATLAB example whdl/WHDLOFDMTransmitterExample. I have successfully generated both the HDL code and the corresponding testbench. However, when I simulate the design in Xilinx Vivado, I do not observe any activity on the output signals txData_re[15:0] and txData_im[15:0].

Despite running the provided testbench, these outputs remain static or undefined in simulation. I would appreciate guidance on any additional clock, reset, or clock-enable handling required in Vivado, or any known issues when simulating this example outside MATLAB.

Thanks in advance for your help.