Does anyone know why I am getting sometimes wrong data and some time correct data from my FPGA?

I developed a simple OFDM system. Basically, my system receive serial data from my pc. Then It calculates an OFDM simbol which is send back to the PC through serial communication.

The system works as follow:

I used two RAMs (one which stores data from the pc => RAM_Rx and another which stores the OFDM symbol data which is send to the pc => RAM_Tx) With the 0s and 1s that the FPGA stores in RAM_Rx It calculates the OFDM symbol using a QPSK modulation and the dps.HDLIFFT system object (provided by Matlab). After the IFFT process the complex data generated is converted to binary and this binary data is stored in RAM_Tx. Finally, the RAM_tx is read in order to send this bits to the PC throught serial communication.

My problem is that sometimes I receive the data that It is supposed to be but sometimes I do not.

Example: Data From PC: [1 0 1 1 ...], with this data the OFDM symbol is supposed to be [a + jb . . .]

Sometimes I receive [c + jd . . .] instead of [a + jb . . .] and sometimes I receive [a + jb . . .] which is correct.

My question is if anyone has a hint about why sometimes my system works wrong and sometimes works fine.