Effacer les filtres
Effacer les filtres

HDL code generation problem

1 vue (au cours des 30 derniers jours)
Bijoy
Bijoy le 19 Juin 2013
Can anyone give some details on the fiaccel function? i am getting this error during the HDL code generation in the step "Verify floating point". I am stuck at this point and cannot go ahead with my design. Please help and thanks in advance.

Connectez-vous pour répondre à cette question.

Réponses (1)

Kiran Kintali
Kiran Kintali le 29 Août 2013
Can you give us more details?
what error are you seeing that led you to believe you have an issue with fiaccel? Thanks.

Catégories

En savoir plus sur Xilinx FPGA and SoC Devices dans Help Center et File Exchange

Tags

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by