HDL Coder Support Package for Intel FPGA Boards

Generate and deploy HDL code for Altera development boards
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Mise à jour 13 sept. 2023
HDL Coder™ Support Package for Altera® FPGA Boards enables IP core generation workflow for programming supported Altera FPGAs. The IP core generation workflow helps you map your algorithm I/O to onboard interfaces, generate HDL code, and synthesize the generated code. HDL Coder also provides integration with Altera Quartus® to synthesize the generated code into a bitstream that you can directly download on to Altera FPGA development boards.
This support package is functional for R2014a up through R2023b. For R2024a and beyond, HDL Coder Support Package for Intel FPGA Boards support is provided via HDL Coder Support Package for Intel FPGA and SoC Devices.
Compatibilité avec les versions de MATLAB
Créé avec R2016b
Compatible avec les versions R2016b à R2023b
Plateformes compatibles
Windows macOS (Apple Silicon) macOS (Intel) Linux

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