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Jean-Serge Cardinal


Last seen: 18 jours il y a |  Actif depuis 2021

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Question


Memory not Initialized in Simulink HDL causing problems in FPGA simulation.
The FPGA simulation, like modelsim, does not like reading from not initialized memory, it creates undefined signals. But I canno...

plus d'un an il y a | 1 réponse | 0

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Question


Is it possible to have tags=signal name in Simulink?
The Goto and From blocks in Simulink are not using the signal names, they have there own "tag" name, which is anoying. Is there ...

plus d'un an il y a | 1 réponse | 0

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A répondu
'CEF Helper' ate all my RAM and abused my GPU - what is it doing?
I fix this problem by upgrading from Kubuntu from 18 to 21.

presque 2 ans il y a | 0

Question


In HDL Simulink, How to convert from integer to boolean array.
I can do it with a bunch of "Extract Bits" block, one for every bit. Is there a better way with HDL blocks?

environ 2 ans il y a | 1 réponse | 0

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A répondu
'CEF Helper' ate all my RAM and abused my GPU - what is it doing?
I also have a problem with cef_helper on version 2021b. The computer hangs a few seconds once a while, and I can hear the fan sp...

plus de 2 ans il y a | 1

Question


cef_helper with Simulink 2021b in Linux
With Simulink 2021b, my computer hangs for a few seconds once every about 30seconds. In the processes, I notice that cef_helper ...

plus de 2 ans il y a | 1 réponse | 0

1

réponse