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Anze Slosar


Last seen: environ un an il y a Actif depuis 2022

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Compiling fixedpt converted code into VHDL
We have a matlab code that we compile into VHDL. We have a make file that did this programmatically using something like codeg...

environ un an il y a | 1 réponse | 0

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réponse

Question


What exactly do coder config InputPipeline and OutputPipeline do?
I would like to optimized vhdl coder generated code for speed. The code is a simple matlab function that is a linear stringing ...

environ un an il y a | 1 réponse | 0

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Question


hdlcoder.optimizeDesign on matlab function
I am trying to speed optimized a matlab generated hdl code. I managed to generate the code, synthesize and place and route, all ...

environ un an il y a | 1 réponse | 0

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réponse

Question


How to reduce required clock multiplier (oversampling) in VHDL code generation.
A routine compiles into VHDL fine and runs in the simulation, however, it requires the clock to run at a high multiplier: ##MES...

plus d'un an il y a | 1 réponse | 0

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Question


HDL coder implementation of dsp.MovingAverage (moving/block average)
We're having some trouble with a very simple moving average type code that compiles fine into VHDL, but either crashes the FPGA ...

plus d'un an il y a | 1 réponse | 0

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Question


How to specify class method to compile to codegen
I need to use matlab to compile some VHDL code. I need to use several instances of the same functional block. The only way to ha...

plus d'un an il y a | 2 réponses | 0

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réponses

Question


HDLcoder ignores coder.const
I'm tryint to compile some code into HDL. There are weights used in digital filter which I want to precompute at the compile tim...

plus d'un an il y a | 2 réponses | 0

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Question


Compile-time constants for HDL Coder
I want to know what is the right way to implement compile time constants into code that will eventually be compiled into VHDL. ...

plus d'un an il y a | 1 réponse | 0

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Question


dsp.FFT does not work with HDL coder
Hi, I have a code and a testbench code that I'm trying to convert to VHDL. The code uses FFT. When I use canned FFT, I get "Fu...

plus d'un an il y a | 1 réponse | 0

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réponse