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Symbol Synchronizer

Correct symbol timing clock skew

  • Symbol Synchronizer block

Communications Toolbox / Synchronization


The Symbol Synchronizer block corrects symbol timing clock skew for PAM, PSK, QAM, or OQPSK modulation schemes between a single-carrier transmitter and receiver. For more information, see Symbol Synchronization Overview.


The input signal operates on a sample rate basis, while the output signal operates on a symbol rate basis.


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Recover frame synchronization from a QPSK system impaired by a variable timing error. The example shows the benefit of performing symbol synchronization to assist the frame synchronization.

The cm_ex_symbol_frame_sync model restores frame synchronization due to a variable timing error. The Variable Fractional Delay block introduces a varying timing error to a root raised cosine (RRC) filtered QPSK signal. After the AWGN block, the receive path is duplicated to compare performance with and without a Symbol Synchronizer block in the path. The Symbol Synchronizer block corrects for clock skew between the transmitter and receiver, aligning the output signal with a valid clock reference. For the timing error conditions in this example, the symbol synchronizer returns a vector containing 99, 100, or 101 symbols for a 200-sample input vector.

The Frame Synchronizer block aligns the symbol stream along correct frame boundaries using the frame header present in the signal. It also provides the valid frame indicator signal to the BER Data Decoding subsystem, which calculates the bit error rate (BER). To avoid calculating the BER on nonvalid frames, the BER Data Decoding subsystem regenerates the input data bits rather than using the Bit Generation block output.

For a 20 dB signal-to-noise ratio and variable timing error in the range of [0, 0.9] samples, signal recovery is successful on the receiver path that includes symbol synchronization. The timing error varies over time, causing the constellation to oscillate between corrupted and clean states as seen in the Before Sym Sync signal in the Constellation Diagram block. The After Sym Sync signal in the constellation diagram shows that the symbol synchronizer removes the variable timing error signal impairment.

The BER with and without symbol synchronization show the performance improvement due to the Symbol Synchronizer block.

Error rate with symbol synchronization: 0.000
Error rate without symbol synchronization: 0.010

Correct a fixed symbol timing offset on a noisy QPSK signal by using the Symbol Synchronizer block. The number of symbols output by the Symbol Synchronizer block is variable size. If a fixed size signal is required for downstream processing, you can use a Selector (Simulink) block to convert the Symbol Synchronizer output to a fixed size signal.

Explore Model

The Delay block adds a fixed timing error of 2 samples to the signal at the Raised Cosine Transmit Filter block output. Since the Raised Cosine Transmit Filter block configuration outputs 4 samples per symbol, the timing delay is 0.5 symbols. The output of the symbol synchronizer is converted to a fixed size signal by the Selector block.

View Results

To see how the symbol synchronizer improves QPSK symbol resolution, view the constellations of the signal before symbol synchronization, and the variable size and fixed size signals after symbol synchronization.



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Input samples, specified as a scalar or column vector of a PAM, PSK, QAM, or OQPSK modulated single-carrier signal. This port in unnamed on the block.

Data Types: double | single
Complex Number Support: Yes


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Output signal symbols, returned as a variable-size scalar or column vector that has the same data type as the input. For an input with dimensions of Nsamp-by-1, the output at Sym has dimensions of Nsym-by-1. Nsym is approximately equal to Nsamp divided by the Nsps. Nsps is equal to the Samples per symbol parameter value. The output length is truncated if it exceeds the maximum output size of NsampNsps×1.1.

This port is unnamed when Normalized timing error output port is not selected.

Estimated timing error for each input sample, returned as a scalar or column vector with values in the range [0, 1]. The estimated timing error is normalized by the input sample time. Err has the same data type and size as the input signal.


To enable this port, select Normalized timing error output port.


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To edit block parameters interactively, use the Property Inspector. From the Simulink® Toolstrip, on the Simulation tab, in the Prepare gallery, select Property Inspector.

Modulation type, specified as PAM/PSK/QAM, or OQPSK.

Type of timing error detector, specified as Zero-Crossing (decision-directed), Gardner (non-data-aided), Early-Late (non-data-aided), or Mueller-Muller (decision-directed). This parameter assigns the timing error detection scheme used in the synchronizer.

For more information, see Timing Error Detection (TED).

Samples per symbol, specified as a positive integer greater than 1. For more information, see Nsps in Loop Filter.

Damping factor of the loop filter, specified as a positive scalar. For more information, see ζ in Loop Filter.

Tunable: Yes

Normalized bandwidth of the loop filter, specified as a positive scalar less than 1. The loop bandwidth (Bn) is normalized by the symbol rate (Ts) of the input signal. For more information, see BnTs in Loop Filter.


To ensure that the symbol synchronizer locks, set the Normalized loop bandwidth parameter to a value less than 0.1.

Tunable: Yes

Phase detector gain, specified as a positive scalar. For more information, see Kp in Loop Filter.

Tunable: Yes

Select this parameter to output normalized timing error data at the output port Err.

Type of simulation to run, specified as Code generation or Interpreted execution.

  • Code generation — Simulate the model by using generated C code. The first time you run a simulation, Simulink generates C code for the block. The model reuses the C code for subsequent simulations unless the model changes. This option requires additional startup time, but the speed of the subsequent simulations is faster than with the Interpreted execution option.

  • Interpreted execution — Simulate the model by using the MATLAB® interpreter. This option shortens startup time, but the speed of subsequent simulations is slower than with the Code generation option. In this mode, you can debug the source code of the block.

For more information, see Simulation Modes (Simulink).

Block Characteristics

Data Types

double | single

Multidimensional Signals


Variable-Size Signals



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[1] Rice, Michael. Digital Communications: A Discrete-Time Approach. Upper Saddle River, NJ: Prentice Hall, 2008.

[2] Mengali, Umberto and Aldo N. D’Andrea. Synchronization Techniques for Digital Receivers. New York: Plenum Press, 1997.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Version History

Introduced in R2015a