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Processor-in-the-Loop Simulation

Test generated code on target processor or simulator

A processor-in-the-loop (PIL) simulation cross-compiles generated source code, and then downloads and runs object code on your target hardware. By comparing normal and PIL simulation results, you can test the numerical equivalence of your model and the generated code. During a PIL simulation, you can collect code coverage and execution-time metrics for the generated code.

A PIL simulation requires a connectivity configuration.


SIL/PIL ManagerVerify generated code


targetManage target hardware and build tool information


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target.AddOnDescribe add-on properties for target type
target.APIDescribe API details
target.APIImplementationDescribe API implementation details
target.BoardProvide hardware board details
target.BuildDependenciesDescribe C and C++ build dependencies to associate with target hardware
target.CommunicationChannelDescribe communication channel properties
target.CommunicationInterfaceDescribe data I/O details for target hardware
target.CommunicationProtocolStackDescribe communication protocol parameters
target.ConnectionBase class for target connection properties
target.ConnectionPropertiesDescribe target-specific connection properties
target.MainFunctionProvide C and C++ dependencies for main function of target hardware application
target.PILProtocolDescribe PIL protocol implementation for target hardware
target.PortDescribe connection via target hardware port
target.PortConnectionDescribe target connection port
target.ProcessorProvide target processor information
target.RS232ChannelDescribe serial communication channel
target.TargetConnectionProvide details about connecting MATLAB computer to target hardware
target.TCPChannelDescribe TCP communication properties
target.ToolsDescribe properties of tools for target hardware
target.UDPChannelDescribe UDP communication
target.ApplicationStatusDescribe status of application on target hardware
target.Breakpoint Provide breakpoint details for debugger
target.DebugExecutionToolProvide MATLAB service interface for debugger to manage processes on target hardware
target.DebugIOToolDebug byte stream I/O tool service interface
target.ExecutionServiceDescribe implementation of execution service for target application
target.ExecutionToolMATLAB service interface for tool that manages application execution on target hardware
target.MATLABDependenciesDescribe MATLAB class and function dependencies
target.ApplicationExecutionToolCapture system command information to run application from MATLAB computer
target.CommandCapture system command for execution on MATLAB computer
target.HostProcessExecutionToolCapture system command information to run target application from MATLAB computer
target.SystemCommandExecutionToolCapture system command information to run target application from MATLAB computer
target.FunctionProvide function signature information
target.TimerProvide timer details for processor


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rtw.connectivity.ComponentArgsProvide parameters for each target connectivity component
rtw.connectivity.ConfigDefine connectivity implementation that comprises builder, launcher, and communicator components
rtw.connectivity.ConfigRegistryRegister connectivity configuration
rtw.connectivity.MakefileBuilderConfigure toolchain-based build process
rtw.connectivity.LauncherControl downloading, starting, and resetting of a target application
rtw.connectivity.RtIOStreamHostCommunicatorConfigure development computer communications with target processor
rtw.pil.RtIOStreamApplicationFrameworkConfigure target-side communications


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rtIOStreamCloseShut down communications channel
rtIOStreamOpenInitialize communications channel
rtIOStreamRecvReceive data through communication channel
rtIOStreamSendSend data through communication channel
rtiostreamtestTest custom rtiostream interface implementation
rtiostream_wrapperTest rtiostream shared library functions in MATLAB
piltestVerify custom target connectivity configuration for Simulink PIL simulation



Debug Generated Code During SIL or PIL Simulation

Use a debugger to understand the behavior of generated code.

View SIL and PIL Files in Code Generation Report

Produce a code generation report and static code metrics that cover SIL and PIL files.

Verification of Code Generation Assumptions

The SIL or PIL simulation checks code generation assumptions.