Basic HDL Algorithms

Create simple HDL designs using basic Simulink^® blocks

The HDL Coder block library contains many basic blocks that you can add to your Simulink modeling environment and develop your HDL algorithm. These blocks include input sources, output sinks, and blocks that perform basic to complex math and trigonometric operations.

To filter the Simulink Library Browser to show only HDL-supported blocks, enter hdllib. The blocks listed in this section include those blocks that are only available in the HDL Coder library. Blocks such as Add and Product are available in the Simulink library in the Library Browser.

For a filtered list of Simulink blocks supported for HDL code generation, see Simulink Block List (HDL Code Generation).

Functions

hdllib Display blocks that are compatible with HDL code generation

Checks

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Block-Level Checks

Check for infinite and continuous sample time sources

Check for large matrix operations

Model Settings

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Test Points and Diagnostics

DUT Port Configuration Parameters

Diagnostic Parameters for Reals and Black Box Interfaces

RTL Annotation Parameters

Data Types

Input and Output Port and Clock Enable Output Type Parameters

Complex Signals Postfix Parameters

Generate Statement and Vector and Component Instance Label Parameters

Blocks

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Logic and Bit Operations

Bit Concat	Concatenates up to 128 input words into single output
Bit Reduce	AND, OR, or XOR bit reduction on all input signal bits to single bit
Bit Rotate	Rotate input signal by bit positions
Bit Shift	Logical or arithmetic shift of input signal
Bit Slice	Return field of consecutive bits from input signal
Bits to Word	Convert vector of bits to integer
Word to Bits	Converts real numbers to vector of bits

Lookup Tables

Sine HDL Optimized and Cosine HDL Optimized

Implement fixed-point sine and cosine wave by using lookup table approach optimized for HDL code generation

Sources

HDL Counter

Free-running or count-limited hardware counter

HDL Math Library

Atan2	Implement control signal based `atan2` function
Sin	Implement control signal based sine function
Cos	Implement control signal based cosine function
Cos+jSin	Implement control signal based `Cos+jSin` function
SinCos	Implement control signal based sine and cosine function
rSqrt	Implement control signal based reciprocal square-root function
Sqrt	Implement control signal based square root function
Divide	Implement control signal based division operation
Reciprocal	Implement control signal based reciprocal operation

Topics

Basic Modeling

Model and Debug Test Point Signals with HDL Coder
An example that shows how to add test points to signals in your model and debug these signals in the generated HDL code.
Generate DUT Ports for Tunable Parameters
Generate DUT ports for tunable parameters.
Generate Code with Annotations or Comments
How to add annotations to generated HDL code using the DocBlock and model annotations.
Scalarization of Vector Ports in Generated VHDL Code
Flatten vector signals on entire model or at DUT level into a structure of scalar signals in generated VHDL code.
Simulate and Generate HDL Code for the Float Typecast Block
Use Float Typecast block to cast input to floating-point or fixed-point.

Data Type Support

Supported Data Types and Scope
MATLAB^® data type and scope support for HDL code generation.
Signal and Data Type Support
HDL code generation support for signal types and data types.

Featured Examples

Implement Control Signal-Based Mathematical Functions by Using HDL Coder

HDL Coder™ provides HDLMathLib blocks that have control signal-based fixed-point mathematical functions. The blocks have control signals that indicate whether the input and output data are valid. You can also simulate these block with latency.

Open Script

Implement Sqrt Block With Control Signals

Implement the control-signal based Square root block and use it to generate HDL code.

Open Script

Implement rSqrt Block With Control Signals

Implement the control-signal based reciprocal square root block and use it to generate HDL code.

Open Script

Implement Divide Block With Control Signals

Implement the control-signal based Divide block and use it to generate HDL code.

Open Script

Implement Reciprocal Block With Control Signals

Implement the control-signal based Reciprocal block and use it to generate HDL code.

Open Script

Implement Atan2 Block With Control Signals

Implement the control-signal based Atan2 block and use it to generate HDL code.

Open Script

Implement Sine and Cosine Block With Control Signals

Implement the control-signal based SinCos block and use it generate HDL code.

Open Script

Convert Input Vector of Bits to Integer

Use the Bits to Word block in a Simulink® Model that converts vector of bits to an unsigned integer. You also generate HDL code for the model.

Open Script

Convert Integer to Vector of Bits

Implement the Word to Bits block in a Simulink® Model that converts an integer to a vector of bits. You also generate HDL code for the model.

Open Script