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Peripheral Management

Configure Infineon AURIX TC4x microcontrollers using blocks, peripheral app and configuration parameter settings

Before communicating with target hardware, first apply block settings, hardware configuration parameters and peripheral app settings.

Blocks

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Digital Port ReadRead GPIO pin(s) status (Since R2022b)
Digital Port WriteSet GPIO pin(s) status (Since R2022b)
Hardware InterruptTrigger downstream function-call subsystem from an interrupt service routine (Since R2022b)
EncoderMeasures rotation of motor in ticks (Since R2022b)
PWMGenerate pulse width modulated waveforms (Since R2022b)
QSPIWrite data to and read data from an SPI peripheral device (Since R2022b)
TMADCMeasure voltage of an analog input pin (Since R2022b)
DSADCMeasure voltage of an analog input pin using delta-sigma conversion (Since R2023b)
SENTRead high-resolution sensor data over Single Edge Nibble Transmission (SENT) protocol (Since R2023b)
FCCDetect when analog input signal crosses 10-bit threshold value (Since R2024a)
ResolverMeasure position of resolver sensor (Since R2024a)
CDSPProcess data output from ADC peripherals of IFX TC4x (Since R2024a)
Memory CopyCopy to and from memory section
Byte PackConvert input signals to 8-, 16-, or 32-bit vector
Byte UnpackUnpack 8-, 16-, or 32-bit input vector to multiple output vectors
Byte ReversalReverse little-endian data for big-endian processor
Interprocess Data ChannelModel interprocessor data channel between two processors (Since R2020b)
Interprocess Data ReadReceive messages from another processor using interprocess communication channel (Since R2020b)
Interprocess Data WriteSend messages to another processor using interprocessor data write (Since R2020b)

Tools

Hardware MappingMap tasks and peripherals in a model to hardware board configurations (Since R2022b)
TasksMap tasks in the Infineon AURIX to interrupt service routines on the hardware board (Since R2022b)
Digital Port Read Peripheral ConfigurationMap Digital Port Read peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
Digital Port Write Peripheral ConfigurationMap Digital Port Write peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
Encoder Peripheral ConfigurationMap encoder peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
PWM Peripheral ConfigurationMap PWM peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
QSPI Peripheral ConfigurationMap QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
TMADC Peripheral ConfigurationMap TMADC peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2022b)
DSADC Peripheral ConfigurationMap DSADC peripherals in the Infineon AURIX model to peripheral registers in the MCU (Since R2023b)
SENT ConfigurationMap data transfer over SENT protocol in the Infineon AURIX model to peripheral registers in the MCU (Since R2023b)
FCC Peripheral ConfigurationMap FCC peripherals in the model to peripheral registers in MCU (Since R2024a)
Resolver Peripheral ConfigurationMap resolver peripherals in model to peripheral registers in MCU (Since R2024a)
CDSP Peripheral ConfigurationMap CDSP peripherals in the model to peripheral registers in the MCU (Since R2024a)

Model Settings

Model Configuration Parameters

Topics