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Merge Message Lines for Architectures Using Adapter Block

This example shows how to use an Adapter block to merge multiple message lines in a System Composer™ architecture model.

Open the model.


In this model, message-based communication is constructed between three software components: two send components, SAC1 and SAC2, create messages and send them to a receive component, SAC3.

  • The SAC1 component linked to the Simulink® behavior model mBottomupMsg1 generates messages with value 1 with a 0.1 sample time.

  • The SAC2 component linked to the Simulink behavior model mBottomupMsg2 generates messages with value 8 with a 0.2 sample time.

  • The SAC3 component linked to the Simulink behavior model mBottomupMsg3 receives the merged messages using a rate-based Subsystem block with a 0.5 sample time.

A first-in, first-out (FIFO) queue is used as a message buffer between the components.


You can double-click the Adapter block to view the Interface Adapter dialog box. Confirm that the interface conversion Merge is applied. Mappings are now disabled.


Simulate the model to merge the messages from the send components SAC1 and SAC2 produced by Simulink behaviors into a single destination, the receive component SAC3.


Launch the Simulation Data Inspector to view the three messages together on the same diagram.



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