Using HDL Coder IP core in Xilinx Vivado instead of EDK
1 vue (au cours des 30 derniers jours)
Afficher commentaires plus anciens
Stefan Schwarzer
le 14 Juil 2014
Commenté : Stefan Schwarzer
le 14 Juil 2014
I need to use an IP core generated with HDL Coder in Xilinx Vivado 2014.2. The core generated by the coder is intended to be used in Xilinx EDK. The IP core converter implemented in Vivado 2014.2 has troubles to identify the AXI interfaces in my core correctly, so I would have to set the AXI parameters manually, which is a very time consuming task, especially if performed more than once. Will you support direct generation of IP cores for Vivado in the future?
0 commentaires
Réponse acceptée
Wang Chen
le 14 Juil 2014
Hi Stefan,
Yes, the IP core generation feature for Xilinx Vivado will be supported in MATLAB R2014b release. You can already try out this feature in R2014b pre-release.
Thanks, Wang
Plus de réponses (0)
Voir également
Produits
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!