HDL Coder removes I/Os of a model reference when they are terminated inside the model reference
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When the input signals of a model reference are terminated inside the model reference, HDL Coder removes the I/Os during HDL code generation, is there a workaround to keep the I/Os?
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Kiran Kintali
le 15 Nov 2021
Modifié(e) : Kiran Kintali
le 15 Nov 2021
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https://www.mathworks.com/help/hdlcoder/ug/remove-redundant-logic-in-design.html
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