tristate input in hdl verifier?

1 vue (au cours des 30 derniers jours)

Poorren le 14 Nov 2022

Hi guys,

I met a problem on how to generate tristate bus stimulus in hdl verifier. In details, I need to verify a bus read/write.

So, the data bus need to driven as high impedance during read cycle.

Based on my knowledge, it seems that there's not way to do so. I wonder there is another possible way to accomplish this.

Thanks advance!

Regards,

Jeff

Code Generation HDL Coder

En savoir plus sur HDL Coder dans Help Center et File Exchange

Find the treasures in MATLAB Central and discover how the community can help you!

Translated by