SystemC code generation directly from SIMULINK model

I have a SIMULINK model designs that have been compiled as generic ASIC HDL. I would like to convert the design to a SystemC model to start presilicon software development.

The references to SystemC generation that I found so far all assumes starting from MATLAB not Simulink https://www.mathworks.com/help/hdlcoder/systemc-code-generation-from-matlab.html Another question posted asked if SystemC can be generated from HDL Verifier. There was no detail on the process except that SIMULINK coder is required. https://www.mathworks.com/matlabcentral/answers/120830-systemc-code-generation-from-the-hdl-verifier?s_tid=sug_su

I would like to know the steps to generated a SystemC modele from an existing Simulink design that has been successful compiled using HDL Coder.

Answer 1

[Kiran Kintali]

HDL Coder generates Synthesizable VHDL, Verilog and SystemVerilog for a DUT in Simulink model for targeting ASIC/FPGA/SoC workflows.

Currently Synthesizable SystemC / C++ Code Generation for High Level Synthesis (HLS) workflows is only limited to MATLAB workflows. Simulink support is on the future roadmap. Please reach out to tech support with your usecases for Simulink support.

[John Terry]

The documentation states one can export SystemC TLM compatible level models from Simulink. How does this differ?

ASIC Testbench for HDL Verifier™ is an add-on that enables HDL Verifier to generate test components and verification models from MATLAB® or Simulink® into Universal Verification Methodology (UVM) or SystemVerilog environments. These models run natively in your HDL simulator.

• Generate SystemVerilog Direct Programming Interface (DPI) components from MATLAB and Simulink. For more information, see SystemVerilog DPI Component Generation.
• Generate UVM components or environments from MATLAB and Simulink. For more information, see UVM Component Generation Overview.
• Export SystemC™ TLM-compatible transaction-level models from Simulink. For more information, see TLM Component Generation.

Transaction Level Model Generation

Generation of SystemC TLM virtual prototypes

HDL Verifier™ integrates with Simulink® Coder™ or Embedded Coder® to export SystemC™ TLM-compatible transaction-level models. You can integrate this component into your HDL simulation as a behavioral model.

The TLM generation tool provides a default socket and memory configuration. To customize the socket and memory map of the TLM component, provide an IP-XACT™ file. You can configure the generated component to use a SystemC thread or a callback function.

HDL Verifier generates a TLM test bench, test vectors, and a makefile to verify the component and assist with integration into your HDL simulator environment.

To use this functionality, download and install the ASIC Testbench for HDL Verifier add-on.

[Kiran Kintali]

HDL Verifier helps you verify the RTL. SystemC based workflows in HDL Verifier work with Simulink.

[John Terry]

Kiran

It is not clear to me what the meaing of your comment above.

Are you saying that if you already have a SystemC design that you can use HDL Verifer to have it work with Simulink but the oppose is not true. Meaning, you cannot using HDL Verifier to create SystemC abstraction of the Simulink mode?

If you mean that HDL Verifier cannot be used to generate SystemC abstraction model, then what is the meaning of this text

The TLM generation tool provides a default socket and memory configuration. To customize the socket and memory map of the TLM component, provide an IP-XACT™ file. You can configure the generated component to use a SystemC thread or a callback function.

HDL Verifier generates a TLM test bench, test vectors, and a makefile to verify the component and assist with integration into your HDL simulator environment.

[Bhanu]

Hi John,

Using HDL Verifier, you can generate SystemC TLM 2.0 models from Simulink model.

Please find examples below

https://in.mathworks.com/help/hdlverifier/ug/getting-started-with-tlm-generator.html

https://in.mathworks.com/help/hdlverifier/examples.html?category=transaction-level-model-generation